In April 2006, the JEDEC group formulated a serial interface specification (JESD204) that enables a high speed serial connection between data converters and logic devices over just 2 wires. The electrical layer of the specification supports code rates of 312.5Mbps to 3.125Gbps across a CML (Current Mode Logic) pair. The self-clocked serial data stream is encoded using 8B/10B encoding, developed in the early eighties by IBM. 8B/10B encoding provides benefits over conventional serial transmission by using a running disparity to eliminate DC imbalance in the signal. The 8B/10B encoded data is friendly to clock recovery circuits because it is run-length limited, meaning it limits the number of successive ones or zeros, allowing the decoder to extract the clock from the data. 8B/10B encoding involves transforming an 8-bit octet into a 10-bit code group. In each code group the difference between the number of ones and zeros is never more than 2. The encoder keeps track of the number of ones and zeros that have been transmitted in each data set while encoding subsequent data to maintain zero DC offset. Special characters denominated as COMMA symbols are used to align the receiver to the correct boundaries and rates, and the receiver maintains those conditions to collect the subsequent data.