To support the RF engineer in building a very high performance Local Oscillator (LO) with a very low phase noise, NXP offers a Clean-Up PLL reference design application note for the TFF1003, TFF1007, and TFF11xxx-family. The “Clean-Up PLL” design implements a solution capable of delivering the required reference signals for the TFF100x/11xxx which is frequency locked to an externally connected clock. The stand-alone board can be connected to existing TFF100x/11xxx demo boards. It generates a single ended reference output signal in the 27 to 850 MHz frequency range, by using different VCXO/VCO sub-boards that can be directly fed into the TFF100x/11xxx evaluation boards. The reference frequency is locked to an external clock signal that is fed into the application board.