Atlas-SoC Development Platform
Terasic offers their Atlas-SoC development platform, a robust hardware design platform, built around the Altera System-on-Chip (SoC) FPGA
The Atlas-SoC development platform from Terasic is designed for the embedded software developer. It boots Linux, runs web and VNC servers, and provides reference designs, development tools, and tutorials to accelerate the learning curve of developing software for SoCs. This SoC development kit presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core ARM® Cortex®-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility.
- Altera Cyclone® V SE 5CSEMA4U23C6N device
- Serial configuration device – EPCS128
- USB-Blaster II onboard for programming; JTAG mode
- 2 push-buttons
- 4 slide-switches
- 8 green user LEDs
- Three 50 MHz clock sources from the clock generator
- Two 40-pin expansion headers
- One Arduino expansion header (Uno R3 compatibility), can connect with Arduino shields
- One 10-pin analog input expansion header (shared with Arduino analog input)
- 8-channel, 12-bit A/D converter, 500 kSPS 4-pin SPI interface with FPGA
- 925 MHz Dual-core ARM Cortex-A9 processor
- 1 GB DDR3 SDRAM (32-bit data bus)
- 1 Gigabit Ethernet PHY with RJ45 connector
- USB OTG port, USB Micro-AB connector
- micro-SD card socket
- Accelerometer (I²C interface + interrupt)
- UART to USB, USB Mini-B connector
- Warm-reset button and cold-reset button
- One user button and one user LED
- LTC 2 x 7 expansion header
eewiki: Terasic's Altera Cyclone V SE 5CSEMA4U23C6N based DE0-Nano-SoC or Atlas-SoC kit
Atlas-SoC Development Platform
| Image | Manufacturer Part Number | Description | Speed | Number of Cores | RAM Capacity/Installed | Available Quantity | Price | View Details | |
|---|---|---|---|---|---|---|---|---|---|
![]() | ![]() | P0419 | SBC 925MHZ 2 CORE 1GB/1GB RAM | 925MHz | 2 | 1GB/1GB | 0 - Immediate | $124.15 | View Details |



