LTC3402 Datasheet by Analog Devices Inc.

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L7 I EAR LTC3402 TECHNOLOGY 47 ”WV—I I I I l— | ”fl L7LJIJNW
1
LTC3402
3402fb
2A, 3MHz Micropower
Synchronous Boost Converter
The LTC
®
3402 is a high efficiency, fixed frequency, step-
up DC/DC converter that operates from an input voltage
below 1V. The device includes a 0.16Ω N-channel MOSFET
switch and a 0.18Ω P-channel synchronous rectifier.
Switching frequencies up to 3MHz are programmed with
an external timing resistor and the oscillator can be
synchronized to an external clock. An external Schottky
diode is optional but will slightly improve efficiency.
Quiescent current is only 38μA in Burst Mode operation,
maximizing battery life in portable applications. Burst
Mode operation is user controlled and can be enabled by
driving the MODE/SYNC pin high. If the MODE/SYNC pin
has either a clock or is driven low, then fixed frequency
switching is enabled.
Other features include a 1μA shutdown, antiringing con-
trol, open-drain power good output, thermal shutdown
and current limit. The LTC3402 is available in the 10-lead
thermally enhanced MSOP package. Lower current appli-
cations should use the 1A rated LTC3401 synchronous
boost converter. Applications that require V
OUT
< 2.6V
should use the LTC3424.
All Ceramic Capacitor 2-Cell to 3.3V at 1A Step-Up Converter
Cellular Telephones
Handheld Computers
MP3 Players
2-Way Pagers
GPS Receivers
Battery Backup Supplies
CCFL Backlights
Synchronous Rectification: Up to 97% Efficiency
2A Switch Current Rating
Fixed Frequency Operation Up to 3MHz
Wide Input Range: 0.5V to 5V
Very Low Quiescent Current: 38μA (Burst Mode
®
Operation)
2.6V to 5.5V Adjustable Output Voltage
0.85V (Typ) Start-Up Voltage
No External Schottky Diode Required (V
OUT
< 4.3V)
Synchronizable Switching Frequency
Burst Mode Enable Control
Antiringing Control Reduces Switching Noise
PGOOD Output
OPTI-LOOP
®
Compensation
Very Low Shutdown Current: <1μA
Small 10-Pin MSOP Package
Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation.
I
OUT
(mA)
0.1
0
EFFICIENCY (%)
10
30
40
50
100
70
3402 TA02
20
80
90
60
110
100 1000
Burst Mode
OPERATION
1MHz
CONSTANT
FREQUENCY
V
IN
= 2.4V WITH SCHOTTKY
Efficiency
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
3
10
2
6
1
3402 TA01
LTC3402
VIN
SHDN
MODE/SYNC
PGOOD
Rt
SW
VOUT
FB
VC
GND
4
7
8
9
5C3
470pF
C4
4.7pF
2
CELLS
C1
10μF
R5
82k
Rt
30.1k
R2
909k
R1
549k
VOUT
3.3V
1A
L1
2.2μH
C2
44μF
(2 × 22μF)
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
L1: COILCRAFT: D03316P-222
VIN = 1.8V to 3V
0 = FIXED FREQ
1 = Burst Mode OPERATION
+
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
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2
LTC3402
3402fb
(Note 1)
V
IN
, V
OUT
Voltages ......................................0.5V to 6V
SW Voltage ................................................. 0.5V to 6V
V
C
, R
t
Voltages ......................... –0.5V to (V
OUT
+ 0.3V)
PGOOD, SHDN, FB, MODE Voltages ...........0.5V to 6V
Operating Temperature Range (Note 2) .. 40°C to 85°C
Storage Temperature Range ................. 65°C to 125°C
Lead Temperature (Soldering, 10 sec).................. 300°CT
JMAX
= 125°C
θ
JA
= 130°C/ W 1 LAYER BOARD
θ
JA
= 100°C/ W 4 LAYER BOARD
MS PART MARKING
ORDER PART
NUMBER
LTC3402EMS
LTSK
The denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = 1.2V, VOUT = 3.3V unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Start-Up Voltage I
LOAD
= <1mA 0.85 1.0 V
Minimum Operating Voltage (Note 4) 0.5 V
Output Voltage Adjust Range 2.6 5.5 V
Feedback Voltage 1.22 1.25 1.28 V
Feedback Input Current V
FB
= 1.25V 1 50 nA
Quiescent Current—Burst Mode Operation V
C
= 0V, MODE/SYNC = 3.3V (Note 3) 38 65 μA
Quiescent Current—SHDN SHDN = 0V, Not Including Switch Leakage 0.1 1 μA
Quiescent Current—Active V
C
= 0V, MODE/SYNC = 0V, R
t
= 300k (Note 3) 440 800 μA
NMOS Switch Leakage 0.1 5 μA
PMOS Switch Leakage 0.1 10 μA
NMOS Switch On Resistance 0.16 Ω
PMOS Switch On Resistance 0.18 Ω
NMOS Current Limit 2 2.5 A
NMOS Burst Current Limit 0.66 A
Maximum Duty Cycle R
t
= 15k 80 85 %
Minimum Duty Cycle 0%
Switching Frequency R
t
= 15k 1.6 2 2.4 MHz
MODE/SYNC Input High 1.4 V
MODE/SYNC Input Low 0.4 V
MODE/SYNC Input Current V
MODE/SYNC
= 5.5V 0.01 1 μA
Error Amp Transconductance ΔI = –5μA to 5μA, V
C
= V
FB
85 μmhos
PGOOD Threshold Referenced to Feedback Voltage 6 9 12 %
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
UU
W
ELECTRICAL CHARACTERISTICS
1
2
3
4
5
R
t
MODE
V
IN
SW
GND
10
9
8
7
6
SHDN
V
C
FB
V
OUT
PGOOD
TOP VIEW
MS PACKAGE
10-LEAD PLASTIC MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
.1 mo ‘ n ma n \ L7LJIJN§QE
3
LTC3402
3402fb
The denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = 1.2V, VOUT = 3.3V unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
PGOOD Low Voltage I
PGOOD
= 1mA 0.1 0.2 V
V
OUT
= 1V, I
PGOOD
= 20μA 0.1 0.4 V
PGOOD Leakage V
PGOOD
= 5.5V 0.01 1 μA
SHDN Input High V
IN
= V
SHDN
1V
SHDN Input Low 0.4 V
SHDN Input Current V
SHDN
= 5.5V 0.01 1 μA
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime..
Note 2: The LTC3402E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Current is measured into the V
OUT
pin since the supply current is
bootstrapped to the output pin and in the application will reflect to the
input supply by (V
OUT
/V
IN
) • I/Efficiency. The outputs are not switching.
Note 4: Once the output is started, the IC is not dependent upon the V
IN
supply.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Switching Waveform on SW Pin
SW Pin and Inductor Current (IC)
in Discontinuous Mode. Ringing
Control Circuitry Eliminates High
Frequency Ringing Transient Response 5mA to 50mA
SW
1V/DIV
50ns/DIV 3402 G01
SW
1V/DIV
200ns/DIV 3402 G02
0V
0A
IL
50mA/DIV
IOUT
COUT = 22μF 200μs/DIV 3402 G03
L = 3.3μH
fOSC = 1MHz
VOUT
100mV/DIV
50mA
5mA
(TA = 25°C unless otherwise noted)
Transient Response 50mA to 500mA Burst Mode Operation Burst Mode Operation
VOUT
200mV/DIV
550mA
50mA
COUT = 22μF 200μs/DIV 3402 G04
L = 3.3μH
fOSC = 1MHz
VOUT
AC
100mV/DIV
VIN = 1.2V 5ms/DIV 3402 G05
VOUT = 3.3V
COUT = 100μF
IOUT = 250μA
MODE/SYNC PIN = HIGH
SW
1V/DIV
VOUT
AC
100mV/DIV
VIN = 1.2V 200μs/DIV 3402 G06
VOUT = 3.3V
COUT = 100μF
IOUT = 20mA
MODE/SYNC PIN = HIGH
SW
1V/DIV
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4
LTC3402
3402fb
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Converter Efficiency 1.2V to 3.3V
OUTPUT CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3402 G07
0
1
300kHz
3MHz
1MHz
Burst Mode
OPERATION
OUTPUT CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3402 G08
0
1
300kHz
3MHz
1MHz
Burst Mode
OPERATION
VIN (V)
0.8
0
OUTPUT CURRENT (mA)
100
200
300
0.9 11.1 1.2
3402 G09
1.3
400
500
1.4
TA = 25°C
Converter Efficiency 2.4V to 3.3V
Start-Up Voltage
vs IOUT
Converter Efficiency 3.6V to 5V
LOAD CURRENT (mA)
0.1
0
EFFICIENCY (%)
10
30
40
50
100
70
3402 G10
20
80
90
60
110
100 1000
1MHz
FIXED
FREQUENCY
Burst Mode OPERATION
V
IN
= 3.6V
Efficiency Loss Without Schottky
vs Frequency
FREQUENCY (MHz)
0.2
8
10
14
1.4 2.2
3402 G11
6
4
0.6 1.0 1.8 2.6 3.0
2
0
12
EFFICIENCY LOSS (%)
T
A
= 25°C
Current Limit
TEMPERATURE (°C)
–55
CURRENT (A)
2.6
2.8
3.0
65 125
3402 G12
2.4
2.2
2.0 –15 25 105
3.2
3.4
(TA = 25°C unless otherwise noted)
EA FB Voltage Oscillator Frequency Accuracy
TEMPERATURE (°C)
–55
VOLTAGE (V)
1.23
1.24
1.25
65 125
3402 G13
1.22 –15 25 105
1.26
1.27
1.28
TEMPERATURE (°C)
–55
FREQUENCY (MHz)
2.00
65 125
3402 G14
1.95
1.90 –15 25 105
2.05
2.10 R
t
= 15k
NMOS RDS(ON)
TEMPERATURE (°C)
–55
RESISTANCE (Ω)
0.15
65 125
3402 G22
0.10
0.05 –15 25 105
0.20
0.25
0.30 V
OUT
= 3.3V
L7LJL1W _
5
LTC3402
3402fb
TYPICAL PERFOR A CE CHARACTERISTICS
UW
PMOS RDS(ON) Start-Up Voltage Shutdown Threshold
PGOOD Threshold Burst Mode Operation Current VOUT Turn-Off Voltage
TEMPERATURE (°C)
–55
RESISTANCE (Ω)
0.15
65 125
3402 G16
0.10
0.05 –15 25 105
0.20
0.25
0.30 V
OUT
= 3.3V
TEMPERATURE (°C)
–55
VOLTAGE (V)
0.8
65 125
3402 G17
0.7
0.6 –15 25 105
0.9
1.0
1.1
TEMPERATURE (°C)
–55
VOLTAGE (V)
0.70
65 125
3402 G18
0.60 –15 25 105
0.80
0.90
1.00
0.65
1.05
1.10
0.75
0.85
0.95
TEMPERATURE (°C)
–55
PERCENT FROM V
FB
(%)
10.0
65 125
3402 G19
11.0
12.0 –15 25 105
9.0
8.0
7.0
10.5
11.5
9.5
8.5
7.5
TEMPERATURE (°C)
–55
CURRENT (μA)
36
38
65 125
3402 G20
34
32
30 –15 25 105
40
42
44
TEMPERATURE (°C)
–55
VOLTAGE (V)
2.20
65 125
3402 G21
2.10
2.00 –15 25 105
2.30
2.40
2.50
2.15
2.05
2.25
2.35
2.45
(TA = 25°C unless otherwise noted)
L7 LJIJW
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LTC3402
3402fb
R
t
(Pin 1): Timing Resistor to Program the Oscillator
Frequency.
fRHz
OSC
t
=310
10
MODE/SYNC (Pin 2): Burst Mode Select and Oscillator
Synchronization.
MODE/SYNC = High. Enable Burst Mode operation. The
inductor peak inductor current will be 1/3 the current
limit value and return to zero current on each cycle.
During Burst Mode operation the operation is variable
frequency, providing a significant efficiency improve-
ment at light loads. It is recommended the Burst Mode
operation only be entered once the part has started up.
MODE/SYNC = Low. Disable Burst Mode operation and
maintain low noise, constant frequency operation.
MODE/SYNC = External CLK. Synchronization of the
internal oscillator and Burst Mode operation disable. A
clock pulse width of 100ns to 2μs is required to
synchronize.
V
IN
(Pin 3): Input Supply Pin.
SW (Pin 4): Switch Pin. Connect inductor and Schottky
diode here. For applications with output voltages over
4.3V, a Schottky diode is required to ensure that the SW
pin voltage does not exceed its absolute maximum
rating. Minimize trace length to keep EMI and high
ringing down. For discontinuous inductor current, a
controlled impedance is placed from SW to V
IN
from the
UU
U
PI FU CTIO S
IC to eliminate high frequency ringing due to the resonant
tank of the inductor and SW node capacitance, therefore
reducing EMI radiation.
GND (Pin 5): Signal and Power Ground for the IC.
PGOOD (Pin 6): Power Good Comparator Output. This
open-drain output is low when V
FB
< –9% from its
regulation voltage.
V
OUT
(Pin 7): Output of the Synchronous Rectifier and
Bootstrapped Power Source for the IC. A ceramic capaci-
tor of at least 1μF is required and should be located as
close to the V
OUT
and GND pins as possible (Pins 7 and 5).
FB (Pin 8): Feedback Pin. Connect resistor divider tap
here. The output voltage can be adjusted from 2.6V to 5V.
The feedback reference voltage is typically 1.25V.
V
C
(Pin 9): Error Amp Output. A frequency compensation
network is connected to this pin to compensate the loop.
See the section “Compensating the Feedback Loop” for
guidelines.
SHDN (Pin 10): Shutdown. Grounding this pin shuts down
the IC. Tie to >1V to enable (V
IN
or digital gate output). To
operate with input voltages below 1V once the converter
has started, a 1M resistor from SHDN to V
IN
and a 5M
resistor from SHDN to V
OUT
will provide sufficient hyster-
esis. During shutdown, the output voltage will hold up to
V
IN
minus a diode drop due to the body diode of the PMOS
synchronous switch. If the application requires a com-
plete disconnect during shutdown, refer to the section
“Output Disconnect Circuits.”
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7
LTC3402
3402fb
BLOCK DIAGRA
W
1
6
Σ
+
CURRENT
COMP
CURRENT
LIMIT
+
ERROR
AMP FB
R1
R2
1.25V
VC
2.8A TYP
1.25V – 9%
+
+
Burst Mode
CONTROL
+–
PWM
LOGIC
ANTICROSS
COND
ANTIRING
SLOPE COMP
OSC
Rt
GND
N
POK
SLEEP
+
8
VOUT VOUT
2.6V TO 5.5V
7
4
9
MODE/SYNC
3402 BD
2
N10mV
+
SW
1V TO
VOUT + 0.3V
+
VIN
P
3
+
5
SHDN SHUTDOWN
10
ISENSE
AMP
IZERO
AMP
L7 LJIJW
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LTC3402
3402fb
APPLICATIO S I FOR ATIO
WUUU
DETAILED DESCRIPTION
The LTC3402 provides high efficiency, low noise power
for applications such as portable instrumentation. The
current mode architecture with adaptive slope compensa-
tion provides ease of loop compensation with excellent
transient load response. The low R
DS(ON)
, low gate charge
synchronous switches provide the pulse width modula-
tion control at high efficiency.
The Schottky diode across the synchronous PMOS switch
provides a lower drop during the break-before-make time
(typically 20ns) of the NMOS to PMOS transition. The
addition of the Schottky diode will improve efficiency (see
graph “Efficiency Loss Without Schottky vs Frequency”).
While the IC’s quiescent current is a low 38μA, high
efficiency is achieved at light loads when Burst Mode
operation is entered.
Low Voltage Start-Up
The LTC3402 is designed to start up at input voltages of
typically 0.85V. The device can start up under some load,
(see graph Start-Up vs Input Voltage). Once the output
voltage exceeds a threshold of 2.3V, then the IC powers
itself from V
OUT
instead of V
IN
. At this point, the internal
circuitry has no dependency on the input voltage, eliminat-
ing the requirement for a large input capacitor. The input
voltage can drop below 0.5V without affecting the opera-
tion, but the limiting factor for the application becomes the
availability of the power source to supply sufficient energy
to the output at the low voltages.
Low Noise Fixed Frequency Operation
Oscillator. The frequency of operation is set through a
resistor from the R
t
pin to ground where f = 3 • 10
10
/R
t
. An
internally trimmed timing capacitor resides inside the IC.
The oscillator can be synchronized with an external clock
inserted on the MODE/SYNC pin. When synchronizing the
oscillator, the free running frequency must be set to
approximately 30% lower than the desired synchronized
frequency. Keeping the sync pulse width below 2μs will
ensure that Burst Mode operation is disabled.
Current Sensing. Lossless current sensing converts the
peak current signal to a voltage to sum in with the internal
slope compensation. This summed signal is compared to
the error amplifier output to provide a peak current control
command for the PWM. The slope compensation in the IC
is adaptive to the input and output voltage. Therefore, the
converter provides the proper amount of slope compensa-
tion to ensure stability and not an excess causing a loss of
phase margin in the converter.
Error Amp. The error amplifier is a transconductance
amplifier with g
m
= 0.1ms. A simple compensation net-
work is placed from the V
C
pin to ground.
Current Limit. The current limit amplifier will shut the
NMOS switch off once the current exceeds its threshold.
The current amplifier delay to output is typically 50ns.
Zero Current Amp. The zero current amplifier monitors the
inductor current to the output and shuts off the synchro-
nous rectifier once the current is below 50mA, preventing
negative inductor current.
Antiringing Control. The anitringing control will place an
impedance across the inductor to damp the ringing on the
SW pin during discontinuous mode operation. The LC
SW
ringing (L = inductor, C
SW
= capacitance on the switch pin)
is low energy, but can cause EMI radiation.
Burst Mode Operation
Burst Mode operation is when the IC delivers energy to the
output until it is regulated and then goes into a sleep mode
where the outputs are off and the IC is consuming only
38μA. In this mode, the output ripple has a variable
frequency component with load current and the steady
state ripple will be typically below 3%.
During the period where the device is delivering energy to
the output, the peak current will be equal to 1/6 the current
limit value and the inductor current will terminate at zero
current for each cycle. In this mode the maximum output
current is given by:
IV
VAmps
OUT MAXBURST IN
OUT
()
6
Burst Mode operation is user controlled by driving the
MODE/SYNC pin high to enable and low to disable. It is
recommended that Burst Mode operation be entered after
the part has started up.
L7LJIJNW f a 143’ 2+
9
LTC3402
3402fb
APPLICATIO S I FOR ATIO
WUUU
COMPONENT SELECTION
Inductor Selection
The high frequency operation of the LTC3402 allows the
use of small surface mount inductors. The minimum
inductance value is proportional to the operating fre-
quency and is limited by the following constraints:
LfH and L VV V
f Ripple V H
IN MIN OUT MAX IN MIN
OUT MAX
>μ >
3() ( ) ()
()
•–
••
where
f = Operating Frequency (Hz)
Ripple = Allowable Inductor Current Ripple (A)
V
IN(MIN)
= Minimum Input Voltage (V)
V
OUT(MAX)
= Maximum Output Voltage (V)
The inductor current ripple is typically set to 20% to 40%
of the maximum inductor current.
Figure 1. Recommended Component Placement. Traces
Carrying High Current Are Direct. Trace Area FB and VC Pins
Are Kept Low. Lead Length to Battery Should be Kept Short
Output Capacitor Selection
The output voltage ripple has several components. The
bulk value of the capacitor is set to reduce the ripple due
to charge into the capacitor each cycle. The max ripple due
to charge is given by:
VR IV
CVf
V
BULK PIN
OUT OUT
=
••
where
I
P
= Peak Inductor Current
The ESR can be a significant factor for ripple in most
power converters. The ripple due to capacitor ESR is
simply given by:
VR
CESR
= I
P
• R
ESR
V
where
R
ESR
= Capacitor Series Resistance
Low ESR capacitors should be used to minimize output
voltage ripple. For surface mount applications, AVX TPS
series tantalum capacitors and Sanyo POSCAP or Taiyo-
Yuden ceramic X5R or X7R type capacitors are recom-
mended. For through-hole applications Sanyo OS-CON
capacitors offer low ESR in a small package size. See Table
2 for a list of component suppliers. In some layouts it may
be required to place a 1μF low ESR capacitor as close to the
V
OUT
and GND pins as possible.
V
OUT
3402 F01
R
t
MODE
V
IN
SW
GND
SHDN
V
C
FB
V
OUT
POK
Table 1. Inductor Vendor Information
SUPPLIER PHONE FAX WEBSITE
Coilcraft (847) 639-6400 (847) 639-1469 www.coilcraft.com
Coiltronics (516) 241-7876 (516) 241-9339 www.coiltronics.com
Murata (814) 237-1431 (814) 238-0490 www.murata.com
(800) 831-9172
Sumida
USA: (847) 956-0666 (847) 956-0702 www.japanlink.com
Japan: 81-3-3607-5111 81-3-3607-5144 sumida
Table 2. Capacitor Vendor Information
SUPPLIER PHONE FAX WEBSITE
AVX (803) 448-9411 (803) 448-1943 www.avxcorp.com
Sanyo (619) 661-6322 (619) 661-1055 www.sanyovideo.com
Taiyo Yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com
For high efficiency, choose an inductor with a high fre-
quency core material, such as ferrite, to reduce core
losses. The inductor should have low ESR (equivalent
series resistance) to reduce the I
2
R losses and must be
able to handle the peak inductor current without saturat-
ing. Molded chokes or chip inductors usually do not have
enough core to support the peak inductor currents in the
1A to 2A region. To minimize radiated noise, use a toroid,
pot core or shielded bobbin inductor. See Table 1 for
suggested components and Table 1 for a list of component
suppliers.
diode is required to ensure that the SW pin voltage does m“ not exceed its absolute maximum rating. The Schottky diode across the synchronous PMOS sWitch provides a lower drop during the break-before-make time (typically 20ns) of the NMOS to PMOS transition. The Schottky diode improves peak efficiency (see graph “Efficiency Loss Without Schottky vs Frequency). Use of a Schottky diode such as a MBR0520L,1N5817 or equivalent. Since slow recovery times Will compromise efficiency, do not use ordinary rectifier diodes. EFFICIENCY (m or f in too too OUTPUT CURRENT imA) Operating Frequency Selection Mm Thereare several conSiderationsinselectingtheoperating frequency of the converter. The first is determining the sensitive frequency bands that cannot tolerate any spec- tral noise. For example, in products incorporating RF communications, the 455kHz IF frequency is sensitive to any noise, therefore switching above 600kHz is deSired. Some communications have sensitivity to 1 .1 MHz. In this case, a 2MHz converter frequency may be employed. The second consideration is the physical Size of the converter.As the operatingfrequency goes up,theinduc- torand filter caps go down in value and size. The trade off is in efficiency since the switching losses due to gate charge are going up proportional with frequency. For example in Figure 2, for a 2.4V to 3.3V converter, the efficiency at 100mA is 5% less at 2MHz compared to 300kHz. Anotheroperatingfrequency consideration is whetherthe application can allow “pulse skipping." In this mode, the minimum ontime oftheconvertercannotsupporttheduty cycle, so the converter ripple will go up and there will be a low frequency component of the output ripple. In many Figure 2. Convener Efficiency 2.4V In 3 1 O L7L.LUN%
10
LTC3402
3402fb
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn from
the input source and reduces input switching noise. Since
the IC can operate at voltages below 0.5V once the output
is regulated, then demand on the input capacitor is much
less and in most applications a 4.7μF is recommended.
Output Diode
For applications with output voltages over 4.3V, a Schottky
diode is required to ensure that the SW pin voltage does
not exceed its absolute maximum rating. The Schottky
diode across the synchronous PMOS switch provides a
lower drop during the break-before-make time (typically
20ns) of the NMOS to PMOS transition. The Schottky
diode improves peak efficiency (see graph “Efficiency
Loss Without Schottky vs Frequency). Use of a Schottky
diode such as a MBR0520L, 1N5817 or equivalent. Since
slow recovery times will compromise efficiency, do not
use ordinary rectifier diodes.
Operating Frequency Selection
There are several considerations in selecting the operating
frequency of the converter. The first is determining the
sensitive frequency bands that cannot tolerate any spec-
tral noise. For example, in products incorporating RF
communications, the 455kHz IF frequency is sensitive to
any noise, therefore switching above 600kHz is desired.
Some communications have sensitivity to 1.1MHz. In this
case, a 2MHz converter frequency may be employed.
The second consideration is the physical size of the
converter. As the operating frequency goes up, the induc-
tor and filter caps go down in value and size. The trade off
is in efficiency since the switching losses due to gate
charge are going up proportional with frequency. For
example in Figure 2, for a 2.4V to 3.3V converter, the
efficiency at 100mA is 5% less at 2MHz compared to
300kHz.
Another operating frequency consideration is whether the
application can allow “pulse skipping.” In this mode, the
minimum on time of the converter cannot support the duty
cycle, so the converter ripple will go up and there will be
a low frequency component of the output ripple. In many
APPLICATIO S I FOR ATIO
WUUU
applications where physical size is the main criterion then
running the converter in this mode is acceptable. In
applications where it is preferred not to enter this mode,
then the maximum operating frequency is given by:
fVV
Vt Hz
MAX NOSKIP OUT IN
OUT ON MIN
_
()
=
where t
ON(MIN)
= minimum on time = 120ns.
Figure 2. Converter Efficiency 2.4V to 3.3V
OUTPUT CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3402 G08
0
1
300kHz
3MHz
1MHz
Burst Mode
OPERATION
Reducing Output Capacitance with a Load Feed
Forward Signal
In many applications the output filter capacitance can be
reduced for the desired transient response by having the
device commanding the change in load current, (i.e.
system microcontroller), inform the power converter of
the changes as they occur. Specifically, a “load feed
forward” signal coupled into the V
C
pin gives the inner
current loop a head start in providing the change in output
current. The transconductance of the LTC3402 converter
at the V
C
pin with respect to the inductor current is typically
170mA/100mV, so the amount of signal injected is pro-
portional to the anticipated change of inductor current
with load. The outer voltage loop performs the remainder
of the correction, but because of the load feed forward
signal, the range over which it must slew is greatly
reduced. This results in an improved transient response.
A logic level feed forward signal, V
FF
, is coupled through
components C5 and R6. The amount of feed forward
19 iii; we FORWARD v —«Nv—1 '— SIGNAL n W mm: Figure 3 Closing the Feedback Loop The LT03402 used current mode control With internal adaptive slope compensation.Currentmodecontrolelimi- nates the 2nd order tilter due to the inductor and output capacitor exhibited in voltage mode controllers, and sim- plifiesittoasingle»polefilterresponse.The productofthe modulator control to output DC gain plus the error amp open-loop gain equals the DC gain of the system. Goc = GCONTROLOUTPUT ' GEA 2°VlN lour GCONTROL = ,GEA : 2000 The output tilter pole is given by: lour Hz fFiLrERPpLE = — 7"an 'Cour where Cour is the output filter capacitor. L7LJL1WW 1 fPOLEt = whichis extremelyclose ; 2 '1: -RZ ocm 4 2-1r-Rz occ2 fZER01 = fPOLEz = Refer to AN76 for more clos 2-11-200106-
11
LTC3402
3402fb
signal is attenuated with resistor R6 and is given by the
following relationship:
RVRV
VI R
FF IN
OUT OUT
6515
5
•• •.
Δ
where ΔI
OUT
= load current change.
APPLICATIO S I FOR ATIO
WUUU
Closing the Feedback Loop
The LTC3402 used current mode control with internal
adaptive slope compensation. Current mode control elimi-
nates the 2nd order filter due to the inductor and output
capacitor exhibited in voltage mode controllers, and sim-
plifies it to a single-pole filter response. The product of the
modulator control to output DC gain plus the error amp
open-loop gain equals the DC gain of the system.
G
DC
= G
CONTROLOUTPUT
• G
EA
GV
I
CONTROL IN
OUT
=2•
, G
EA
2000
The output filter pole is given by:
fI
VC
Hz
FILTERPOLE OUT
OUT OUT
=π••
where C
OUT
is the output filter capacitor.
3
10
2
6
1
3402 F03
LTC3402
V
IN
SHDN
MODE/SYNC
PGOOD
R
t
SW
V
OUT
FB
V
C
GND
4
7
8
9
5
R5
C3
LOAD FEED
FORWARD
SIGNAL V
FF
R6
C5
3.3nF
V
IN
V
OUT
Figure 3
The output filter zero is given by:
fRC
Hz
FILTERZERO
ESR OUT
=1
2• • π
where R
ESR
is the capacitor equivalent series resistance.
A troublesome feature of the boost regulator topology is
the right half plane zero (RHP) and is given by:
fVR
LV
Hz
RHPZ IN O
O
=
2
2
2π
At heavy loads this gain increase with phase lag can occur
at a relatively low frequency. The loop gain is typically
rolled off before the RHP zero frequency.
The typical error amp compensation is shown in Figure 4.
The equations for the loop dynamics are as follows:
fCHz
which is extremelyclose to DC
fRC
Hz
fRC
Hz
POLE
C
ZERO ZC
POLE ZC
161
11
22
1
22010
1
2
1
2
=
••
••
••
π
π
π
Refer to AN76 for more closed-loop examples.
+
1.25V
FB
ERROR
AMP
V
OUT
8
V
C
C
C1
C
C2
3402 F04
R
Z
R2
R1
9
Figure 4
L7 LJIJW
12
LTC3402
3402fb
OUTPUT DISCO ECT CIRCUITS
UU
3
10
2
6
1
3402 TA03
LTC3402
V
IN
SHDN
MODE/SYNC
PGOOD
R
t
SW
V
OUT
FB
V
C
GND
4
7
8
9
5
V
OUT
V
IN
= 0.9V TO 1.5V
0 = FIXED FREQUENCY
1 = Burst Mode OPERATION
RB*
C5
1μF
*SET RB TO FORCE BETA OF 100; RB = (V
OUT
– V
INMIN
– 0.7V) • 100
I
OUTMAX
ZETEX
FMMT717
Single Cell Output Disconnect
Dual Cell Output Disconnect Allowing Full Load Start-Up
3
10
2
6
1
3402 TA04
LTC3402
0 = FIXED FREQUENCY
1 = Burst Mode OPERATION
V
IN
SHDN
MODE/SYNC
PGOOD
R
t
SW
V
OUT
FB
V
C
GND
4
7
8
9
5
R7
1M
V
OUT
V
IN
= 1.8V TO 3V
2N2222
C5
1μF
RG
1M
IRLML6401
N R4 VT“ =uav To T 5v 72”” 5”” vow - NW av L SUUTHA ”é LTBMDZ a TM v sw — W W V 866k? ‘0 SHDN vow ’ --+‘ 2 MODE/SVNC FB 8 —— 32 CELL —— TouE —5 PGOOD v; 9 V 5 R‘ R. GMD 2on max RI Wk [3T TAWD VUDEN JMKZ‘ZBJEESMG 1:11am»; 0 = FIXED FREQUENCV CZ TAWD VUDEN JMKEZSBMUEMM V BUYS‘ Made UPERAT‘ON D‘ ON SEM‘CDNDUCTDR MERM‘ZUTS U CUILCRAFT DOWUE'ZZZ VUHH D‘ ' vW = 2 5v T0 4 iv VDUT . W Jr 5v BDDNA R3 3 LTCSAflZ 1Ms vm 5w 4 R? V 55M W i SHDM van 7 _ , 2 8 LT Ton MODE/SWO FR 2M 6 9 m — moan vc I c: 4 7M T 5 47on R. GND CA m R: R5 4 7pF 549R 30 IK 82K u = FIXED FREQUENCV T = Bum Made OPERA'HON 'LOCATE COMPONENTS AS CLOSE TO TC As POSSTBLE CT TAM) YUDENJMKZTZBJMSMG cz TAM) YUDENJMKSZSBJZZGMM UT 0N SEMTCDNDUCTDR MBRMTzuTs U SUMTDA CDHsarTuu aMHzETx ; E m T In um um OUTPUT CURRENT (mA) um an an m “u an E 5 50 E an m an 20 Tu u m I m we Tun LOAD CURRENT (mA) L7LJL1WW
13
LTC3402
3402fb
3
10
2
6
1
3404 TA05a
LTC3402
VIN
SHDN
MODE/SYNC
PGOOD
Rt
SW
VOUT
FB
VC
GND
4
7
8
9
5
C3
470pF C4
20pF
1
CELL
C1
3.3μF
R3
1M
R5
39k
R2
866k
R1
619k
D1 VOUT
3V
500mA
L1
2.2μH
C2
10μF
C1: TAIYO YUDEN JMK212BJ335MG
C2: TAIYO YUDEN JMK325BJ106MM
D1: ON SEMICONDUCTOR MBRM120T3
L1: COILCRAFT DO1608-222
VIN = 0.9V TO 1.5V
0 = FIXED FREQUENCY
1 = Burst Mode OPERATION
Rt
10k
+
R4
5.1M
TYPICAL APPLICATIO S
U
Single Cell to 3V at 500mA, All Ceramic Capacitor, 3MHz Step-Up Converter Efficiency
OUTPUT CURRENT (mA)
20
EFFICIENCY (%)
40
50
70
90
0.1 10 100 1000
3402 TA05b
0
1
60
30
10
80 Burst Mode
OPERATION
3MHz FIXED
FREQUENCY
Li-Ion to 5V at 300mA, 1MHz Step-Up Converter Efficiency
3
10
2
6
1
3402 TA07a
LTC3402
VIN
SHDN
MODE/SYNC
PGOOD
Rt
SW
VOUT
FB
VC
GND
4
7
8
9
5
C3
470pF
C4
4.7pF
Li-Ion
C1
4.7μF
R3
1M
R5
82k
Rt
30.1k
R2
1.65M
R1
549k
D1* VOUT
5V
600mA
L1
10μH
C2*
22μF
*LOCATE COMPONENTS AS CLOSE TO
IC AS POSSIBLE
C1: TAIYO YUDEN JMK212BJ475MG
C2: TAIYO YUDEN JMK325BJ226MM
D1: ON SEMICONDUCTOR MBRM120T3
L1: SUMIDA CDH53-100
VIN = 2.5V TO 4.2V
0 = FIXED FREQUENCY
1 = Burst Mode OPERATION
LOAD CURRENT (mA)
0.1
0
EFFICIENCY (%)
10
30
40
50
100
70
3402 G10
20
80
90
60
110
100 1000
1MHz
FIXED
FREQUENCY
Burst Mode OPERATION
V
IN
= 3.6V
L7 LJIJW
14
LTC3402
3402fb
High Efficiency, Compact CCFL Supply with Remote Dimming
TYPICAL APPLICATIO S
U
3
10
2
6
1
3402 TA06
LTC3402
V
IN
SHDN
MODE/SYNC
PGOOD
R
t
SW
V
OUT
FB
V
C
GND
4
7
8
9
5
C5
1μF
C4
0.1μF
Li-Ion
C1
10μF
R5
1M
R
t
150k
R2
10k
R3
1k
R4
20k
D4
D1
D2 D3
Q1 Q2
C2
0.22μF
T1
110 2 3 4
5
6
C3
27pF
1kV
CCFL
DIMMING
INPUT
0V TO 2.5V
V
IN
= 2.5V TO 4.2V
R1
300Ω
L1
33μF
C1: TAIYO YUDEN JMK212BJ106MG
C2: PANASONIC ECH-U
D1: ZETEX ZHCS-1000
D2 TO D4: 1N4148
CCFL BACKLIGHT APPLICATION CIRCUITS
CONTAINED IN THIS DATA SHEET ARE
COVERED BY U.S. PATENT NUMBER 5408162
AND OTHER PATENTS PENDING
L1: SUMIDA CD-54-330MC
Q1, Q2: ZETEX FMMT-617
T1: SUMIDA C1Q122
17QHE DBBS+DT27 T DDDDDj (ET; ‘3er 345 Ml" [IUD 7' nachouaai gm DSO e I WE 1393:0152 DETAIL W GAUGE PLANE I 2 3 A ‘enmtnm (muons) HD BETA ("273) 2 mifi: I PLANE DI7 027 ‘L (00;;P0H) 050 A» NOTE {0‘97} I DIMENSIONS IN MILLIMETED/(I “50 2 DRAWING NOT TO SCALE 3 DIMENSION DOES NOT INCLUD MOLD FLASH PROTRUSIONS O A DIMENSION DOES NOT INCLUD INTERLEAD FLASH DR PRDTRU 5 LEAD COPLANARITV (BOTTOM IMuImaImn IIIIIIIsNea hy Lmeav Technmugy CquDmIIan Is behaved In be assume and I Huwevev nu TeSDEIHSIDINy IS assumed IaIIzsuse LmeaITemnqugyampmazmn makesnnve IaIIuIIMazmemIemonnemmnmIIsIIILIIIIsasaescnneaneveImv/IIInaImIImgeoneXIszmgwen HA» I [m4
15
LTC3402
3402fb
PACKAGE DESCRIPTION
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
MSOP (MS) 0603
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.127 ± 0.076
(.005 ± .003)
0.86
(.034)
REF
0.50
(.0197)
BSC
12345
4.90 ± 0.152
(.193 ± .006)
0.497 ± 0.076
(.0196 ± .003)
REF
8910 76
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.50
(.0197)
BSC
------------------ L7 LJIJW
16
LTC3402
3402fb
LT 0607 REV B • PRINTED IN USA
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
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IN
As Low As 1.8V
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OUT
to 34V
LT1613 1.4MHz, Single Cell DC/DC Converter in SOT-23 V
IN
As Low As 1.1V, 3V at 30mA from Single Cell
LT1615 Micropower Step-Up DC/DC Converter in SOT-23 I
Q
= 20μA, 1μA Shutdown Current, V
IN
As Low As 1V
LT1619 High Efficiency Boost DC/DC Controller 1A Gate Drive, 1.1V to 20V Input, Separate V
CC
for Gate Drive
LTC1872 SOT-23 Boost DC/DC Controller 550kHz, 2.5V to 9.8V Input
LT1930/LT1930A 1.2MHz/2.2MHz DC/DC Converters in SOT-23 V
IN
= 2.6V to 16V, 5V at 450mA from 3.3V Input
LT1949 600kHz, 1A Switch PWM DC/DC Converter 1A, 0.5Ω, 30V Internal Switch, V
IN
As Low As 1.5V,
Low-Battery Detect Active in Shutdown
LTC3400 Single Cell, High Current (600mA), Micropower, V
IN
= 0.85V to 5.5V, Up to 92% Efficiency Synchronizable
Synchronous 1.2MHz Step-Up DC/DC Converter Oscillator from 100kHz to 1.2MHz, ThinSOT Package
LTC3401 Single Cell, High Current (1A), Micropower, V
IN
= 0.5V to 5V, Up to 97% Efficiency Synchronizable
Synchronous 3MHz Step-Up DC/DC Converter Oscillator from 100kHz to 3MHz, 10-Lead MSOP Package
LTC3424 Single Cell, High Current (2A), Micropower, V
OUT
= 1.5V, Up to 97% Efficiency Synchronizable
Synchronous 3MHz Step-Up DC/DC Converter Oscillator from 100kHz to 3MHz, 10-Lead MSOP Package
© LINEAR TECHNOLOGY CORPORATION 2000
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
Triple Output Converter
TYPICAL APPLICATIO
U
R1
549k
3402 TA08
R2
909k
C1: TAIYO YUDEN JMK212BJ475MG
C2: TAIYO YUDEN JMK325BJ226MM
D1: ON SEMICONDUCTOR MBRM120T3
D2 TO D7: ZETEX FMND7000 DUAL DIODE
L1: SUMIDA CD43-2R2M
C2
22μF
C3
470pF
C4
4.7pF
C1
4.7μF
4.7μF
D6
D7
0.1μF
2.5V
1mA
VOUT
3.3V
500mA
D1
0.1μF
D2 D3
0.1μF 0.1μF 4.7μF
8V
2mA
D4 D5
3
10
2
6
1
LTC3402
VIN
SHDN
MODE/SYNC
PGOOD
Rt
SW
VOUT
FB
VC
GND
4
7
8
9
5
L1 2.2μH
R3
1M
Rt
30.1k
R5
82k
0 = FIXED FREQ
1 = Burst Mode OPERATION
+2
CELLS
VIN =1.8V TO 3V

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