IRF5210PbF Datasheet by Infineon Technologies

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International IGBR Rectitier D@TC D@TC TSTG JC RUCS RwA TO-220AB
IRF5210PbF
HEXFET® Power MOSFET
PD - 95408
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal resistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -40
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -29 A
IDM Pulsed Drain Current -140
PD @TC = 25°C Power Dissipation 200 W
Linear Derating Factor 1.3 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy780 mJ
IAR Avalanche Current-21 A
EAR Repetitive Avalanche Energy20 mJ
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Mounting torque, 6-32 or M3 screw 10 lbfin (1.1Nm)
Absolute Maximum Ratings
Parameter Typ. Max. Units
RθJC Junction-to-Case 0.75
RθCS Case-to-Sink, Flat, Greased Surface 0.50  °C/W
RθJA Junction-to-Ambient  62
Thermal Resistance
VDSS = -100V
RDS(on) = 0.06
ID = -40A
TO-220AB
lAdvanced Process Technology
lUltra Low On-Resistance
lDynamic dv/dt Rating
l175°C Operating Temperature
lFast Switching
lP-Channel
lFully Avalanche Rated
lLead-Free
Description
06/15/04
S
D
G
Ga‘e-to-Suurce Reverse Leakage Tum-O" De‘ay Tune \npm Capackance Output capacuance Pu‘sed Source Currem Reverse Recoverycharge 100V V35 = 0V ISZR
IRF5210PbF
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode)   showing the
ISM Pulsed Source Current integral reverse
(Body Diode)   p-n junction diode.
VSD Diode Forward Voltage   -1.6 V TJ = 25°C, IS = -21A, VGS = 0V
trr Reverse Recovery Time  170 260 ns TJ = 25°C, IF = -21A
Qrr Reverse RecoveryCharge  1.2 1.8 µC di/dt = -100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -100   V VGS = 0V, ID = -250µA
V(BR)DSS/TJBreakdown Voltage Temp. Coefficient  -0.11  V/°C Reference to 25°C, ID = -1mA
RDS(on) Static Drain-to-Source On-Resistance   0.06 VGS = -10V, ID = -24A
VGS(th) Gate Threshold Voltage -2.0  -4.0 V VDS = VGS, ID = -250µA
gfs Forward Transconductance 10   S VDS = -50V, ID = -21A
  -25 µA VDS = -100V, VGS = 0V
  -250 VDS = -80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage   100 VGS = 20V
Gate-to-Source Reverse Leakage -100 nA VGS = -20V
QgTotal Gate Charge   180 ID = -21A
Qgs Gate-to-Source Charge   25 nC VDS = -80V
Qgd Gate-to-Drain ("Miller") Charge   97 VGS = -10V, See Fig. 6 and 13
td(on) Turn-On Delay Time  17  VDD = -50V
trRise Time  86  ID = -21A
td(off) Turn-Off Delay Time 79 RG = 2.5
tfFall Time  81  RD = 2.4Ω, See Fig. 10
Between lead,
  6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance 2700  VGS = 0V
Coss Output Capacitance 790 pF VDS = -25V
Crss Reverse Transfer Capacitance  450   = 1.0MHz, See Fig. 5
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance  
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD -21A, di/dt -480A/µs, VDD V(BR)DSS,
TJ 175°C
Notes:
VDD = -25V, starting TJ = 25°C, L = 3.5mH
RG = 25, IAS = -21A. (See Figure 12)
Pulse width 300µs; duty cycle 2%.
-40
-140
A
S
D
G
S
D
G
ISER
IRF5210PbF
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
1000
0.1 1 10 10
0
D
DS
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
-4.5V
40µs PULSE WIDTH
T = 25°C
c
1
10
100
1000
0.1 1 10 10
0
D
DS
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
-4.5V
40µs PULSE WIDTH
T = 175°C
C
1
10
100
1000
45678910
T = 25°C
J
GS
D
-I , Drain-to-Source Current (A)
-V , Gate-to-Source Voltage (V)
T = 175°C
V = -50V
40µs PULSE WIDTH
DS
J
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
A
V = -10V
GS
I = -35A
D
ISER
IRF5210PbF
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
1000
2000
3000
4000
5000
6000
1 10 100
C, Capacitance (pF)
A
DS
-V , Drain-to-Source Voltage (V)
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
4
8
12
16
20
0 40 80 120 160 20
0
G
GS
A
-V , Gate-to-Source Voltage (V)
Q , Total Gate Charge (nC)
V = -80V
V = -50V
V = -20V
DS
DS
DS
FOR TEST CIRCUIT
SEE FIGURE 13
I = -21A
D
1
10
100
1000
0.4 0.8 1.2 1.6 2.0 2.
4
T = 25°C
J
V = 0V
GS
SD
SD
A
-I , Reverse Drain Current (A)
-V , Source-to-Drain Voltage (V)
T = 175°C
J
1
10
100
1000
1 10 100 100
0
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10ms
A
-I , Drain Current (A)
-V , Drain-to-Source Voltage (V)
DS
D
10µs
100µs
1ms
T = 25°C
T = 175°C
Single Pulse
C
J
ISER E m u P fi 6 w s um
IRF5210PbF
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
VDD
RG
D.U.T.
+
-
V
DS
9
0%
1
0%
V
GS
t
d(on)
t
r
t
d(off)
t
f
25 50 75 100 125 150 175
0
10
20
30
40
50
T , Case Temperature ( C)
-I , Drain Current (A)
°
C
D
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
(amass ISER
IRF5210PbF
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
QG
QGS QGD
V
G
Charge
-10V
D.U.T. V
D
S
I
D
I
G
-3mA
V
GS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
V
DS
V
DD
DRIVER
A
15V
-20V
0
400
800
1200
1600
2000
25 50 75 100 125 150 17
5
J
E , Single Pulse Avalanche Energy (mJ)
AS
A
Starting T , Junction Temperature (°C)
I
TOP -8.6A
-15A
BOTTOM -21A
D
ISZR
IRF5210PbF
Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
R
e-Applied
V
oltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W .
Period
+
-
+
+
+
-
-
-
RG
VDD
dv/dt controlled by RG
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T*Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
* Reverse Polarity of D.U.T for P-Channel
[ ]
[ ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[ ] ***
Fig 14. For P-Channel HEXFETS
VGS
IEZR Q --\__ m a 4 m .9: ‘ n a9 ASSEMBLY LOTCODE Data and speciticati \ I International IEER Rectifier IR WORLD HEADQUARTERS: 233 Kansas SL, El Segundo, Califo Visit us at www.irf.com
IRF5210PbF
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/04
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
- B -
1.32 (.052)
1.22 (.048)
3X 0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
4.69 (.185)
4.20 (.165)
3X 0.93 (.037)
0.69 (.027)
4.06 (.160)
3.55 (.140)
1.15 (.045)
MIN
6.47 (.255)
6.10 (.240)
3.78 (.149)
3.54 (.139)
- A -
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
3X 1.40 (.055)
1.15 (.045)
2.54 (.100)
2X
0.36 (.014) M B A M
4
1 2 3
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
HEXFET
1- GATE
2- DRAIN
3- SOURCE
4- DRAIN
LEAD ASSIGNMENTS
IGBTs, CoPAC
K
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE:
IN THE ASSEMBLY LINE "C"
THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED ON WW 19, 1997 PART NUMBE
R
AS S EMBL Y
LOT CODE
DATE CODE
YEAR 7 = 1997
LINE C
WEEK 19
LOGO
RECTIFIER
INTERNATIONAL
Note: "P" in assembly line
position indicates "Lead-Free"
http://www.irf.com/package/
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/

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