DS2117 Datasheet by Maxim Integrated

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FEATURES
Fully Compliant with Ultra2, Ultra3, and
Ultra 160/M SCSI
Provides Multimode Low-Voltage
Differential/Single-Ended (LVD/SE)
Termination for Nine Signal Line Pairs
Auto-Selection of LVD or SE Termination
5% Tolerance on SE and LVD
Termination Resistance
Low Power-Down Capacitance of 3pF
On-Board Thermal Shutdown Circuitry
SCSI Bus Hot Plug Compatible
Fully Supports Actively Negated SE SCSI
Signals
PIN CONFIGURATION
DESCRIPTION
The DS2117M Ultra3 LVD/SE SCSI terminator is both a low-voltage differential (LVD) and single-
ended (SE) terminator. The multimode operation enables the designer to implement LVD in current
products while allowing the end user SE-backward compatibility with legacy devices. If the device is
connected in an LVD-only bus, the DS2117M uses LVD termination. If any SE devices are connected to
the bus, the DS2117M uses SE termination. This is accomplished automatically inside the part by sensing
the voltage on the SCSI bus DIFFSENS line.
For the LVD termination, the DS2117M integrates two current sources with nine precision resistor
strings. For the SE termination, one regulator and nine precision 110 resistors are used. Three
DS2117M terminators are needed for a wide SCSI bus.
DS2117M
Ultra3 LVD/SE SCSI Terminato
r
www.maxim-ic.com
32
35
34
33
31
30
29
28
27
26
25
24
LVD
SE
R9N
R8N
R8P
HS GND
HS GND
HS GND
R7N
R7P
R6N
R9P
NC
R1P
R1N
R2N
HS GND
HS GND
R3P
R3N
R4P
R4N
R2P
SSOP
36
23
VREF
NC
TPWR
HVD
HS GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
22
21
20
19
R5P
R5N
ISO
GND
DIFF_CAP
DIFFSENSE
MSTR/SLV
R6P
TOP VIEW
DS2117M
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REFERENCE DOCUMENTS
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface (SPI) Project: 0855-M, 1995
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 2 (SPI-2) Project: 1142-M, 1998
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 3 (SPI-3) Project: 1302-D, 1999
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 4 (SPI-4) Project: 1365-D, xxxx
AVAILABLE FROM:
American National Standards Institute (ANSI) Phone: (212) 642-4900
Global Engineering Documents 15 Inverness Way East; Englewood, CO 80112 Phone: (800) 854-7179
FUNCTIONAL DESCRIPTION
The DS2117 combines LVD and SE termination with DIFFSENSE sourcing and detection.
A bandgap reference is fed into two amplifiers, which creates a 1.25V reference voltage and a 2.85V
reference voltage. The control logic determines which of these references are applied to the termination
resistors. If the SCSI bus is in LVD mode, the 1.25V reference is used. If the SCSI bus is in SE mode, the
2.85V reference is used. That same control logic switches in/out parallel resistors to change the total
termination resistance accordingly. Finally, in SE mode the RP pins are switched to ground.
The DIFFSENSE circuitry decodes trinary logic. There will be one of three voltages on the SCSI control
line called DIFFSENS. Two comparators and a NAND gate determine if the voltage is below 0.6V, above
2.15V, or in between. That indicates the mode of the bus to be HVD, SE, or LVD, respectively.
The DS2117M’s DIFF_CAP pin monitors the DIFFSENS line to determine the proper operating mode of
the device; this mode is indicated by the SE/LVD/HVD outputs. The DIFFSENSE pin can also drive the
SCSI DIFFSENS line (when MSTR/SLV = 1) to determine the SCSI bus operating mode. The DS2117M
switches to the termination mode that is appropriate for the bus based on the value of the DIFFSENS
voltage. These modes are LVD mode, SE mode, and HVD isolation mode.
LVD Mode
LVD termination is provided by a precision laser-trimmed resistor string with two current sources. This
configuration yields a 105differential and 150common-mode impedance. A fail-safe bias of 112mV
is maintained when no drivers are connected to the SCSI bus.
SE Mode
When the external driver for a given signal line turns off, the active terminator pulls that signal line to
2.85V (quiescent state). When used with an active negation driver, the power amp can sink 22mA per line
while keeping the voltage reference in regulation. The terminating resistors maintain their 110value.
HVD Isolation Mode
The DS2117M identifies that there is an HVD (high voltage differential) device on the SCSI bus and
isolates the termination pins from the bus.
When ISO is pulled high, the termination pins are isolated from the SCSI bus, VREF is grounded, and the
bus mode indicators (SE/LVD/HVD) remain active. During thermal shutdown, the termination pins are
isolated from the SCSI bus, VREF is grounded, and the bus mode indicators (SE/LVD/HVD) remain
active. The DIFFSENSE driver is shut down during either of these two events.
DS2117M
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To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As
with all analog circuitry, the TERMPWR and VDD lines should be bypassed locally. A 2.2µF capacitor
and a 0.01µF high frequency capacitor are recommended between TPWR and ground and placed as close
as possible to the DS2117M. The DS2117M should be placed as close as possible to the SCSI connector
to minimize signal and power trace length, thereby resulting in less input capacitance and reflections
which can degrade the bus signals.
To maintain the specified regulation, a 4.7µF capacitor is required between the VREF pin (VREF) and
ground of each DS2117M. A high frequency cap (0.1µF ceramic recommended) can also be placed on the
VREF pin in applications that use fast rise/fall time drivers. A typical SCSI bus configuration is shown in
Figure 2.
DIFFSENS NOISE FILTERING
The DS2117M incorporates a digital filter to remove high-frequency transients on the DIFFSENS control
line, thereby eliminating erroneous switching between modes. This filter eliminates the need for the
external capacitor and resistor, which heretofore performed this function. The external filter can be used
in addition to the digital filter if the DS2117M and DS2118M are to be used interchangeably.
NOTE:
DIFFSENS—Refers to the SCSI bus signal.
DIFFSENSE—Refers to the DS2117M pin name and internal circuitry capable of driving the DIFFSENS
line.
DIFF_CAP—Refers to the DS2117M pin name and internal circuitry relating to monitoring the
DIFFSENS line.
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DS2117M
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Figure 1. DS2117M Block Diagram
TERWWR 7:an '°—t vwn l wwn Ms'wsw | comm ""59 M Mstwva I50 | 130 I s l r mm DIFF_CAF VREF 20K ans 0.1 us nu! I mm l mu ”N55 [57, MSTRISLV F so I m :i I- | = I was maze» DIFFJAF VFEF m; i I_T ._1 i W r r rm | 1m mm Mam/5w E 190 :muuuzsm ISO : | | VREF DIFF_W D1FF_W VIE! nu; i i 4.7yF 1’ =
DS2117M
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Figure 2. SCSI Bus Configuration
DS2117M
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PIN DESCRIPTION
PIN NAME FUNCTION
1 VREF
Reference Voltage. 2.85V reference in SE mode and 1.25V reference in
LVD mode; must be decoupled with a 4.7µF capacitor.
2, 3 NC No Connection. Do not connect these pins.
4–7, 11–16,
22–25, 29–32 RxP, RxN Signal Termination. Connect to SCSI bus signal lines.
8, 9, 10, 26,
27, 28 HS GND Heat Sink Ground. Internally connected to the mounting pad. Should
be grounded.
17 ISO
Isolation. When pulled high, the DS2117M isolates its bus pins (RxP,
RxN) from the SCSI bus.
18 GND Ground. Signal ground, 0V.
19 MSTR/SLV
Master/Slave. Mode select for the non-controlling terminator. When
pulled high (MSTR), the DIFFSENSE driver is enabled.
20 DIFFSENSE DIFFSENSE. Output to drive the SCSI bus DIFFSENS line.
21 DIFF_CAP
DIFFSENSE Capacitor. Connect 0.1µF capacitor for DIFFSENSE
filter. Input to detect the type of device (differential or single-ended) on
the SCSI bus.
33 SE
Single-Ended. SE output of DIFFSENSE receiver; output high
indicates SE bus operation.
34 LVD
Low-Voltage Differential. LVD output of DIFFSENSE receiver;
output high indicates LVD bus operation.
35 HVD
High-Voltage Differential. HVD output of DIFFSENSE receiver;
output high indicates HVD bus operation or thermal shutdown.
36 TPWR
Termination Power. Connect to the SCSI TERMPWR line and
decouple with 2.2µF capacitor.
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES TPWR AME RSE VREI‘ LOSE Com PARAMETER SYMBOL MIN TYP MAX UNITS NOTES DM (‘VI ITPMR 1m 1H. [on IOL mm Lvnon
DS2117M
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RECOMMENDED OPERATING CONDITIONS
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
SE Mode VTPWR(SE) 4.0 5.5 V
Termpower Voltage LVD Mode VTPWR(LVD) 2.7 5.5 V
Logic 0 VIL -0.3 +0.8 V
Logic 1 VIH 2.0
VTPWR
+ 0.3 V
Operating Temperature VAMB 0 70 °C
SINGLE-ENDED CHARACTERISTICS
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
SE Termination Resistance RSE 104.5 110 115.5 1
SE Voltage Reference VREF 2.7 3.0 V
SE Output Current LOSE 25.4 mA 2
Output Capacitance COUT 3 pF 3
LOW-VOLTAGE DIFFERENTIAL CHARACTERISTICS
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Differential-Mode Termination
Resistance RDM 100 110
Common-Mode Termination
Resistance RCM 110 190
Differential-Mode Bias VDM 100 125 mV 4
Common-Mode Bias VCM 1.125 1.375 V
DC CHARACTERISTICS
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Termpower Current ITPMR 12 mA 4
Input Leakage High IIH -1.0 µA
Input Leakage Low IIL 1.0 µA
Output Current High IOH -1.0 mA 5, 7
Output Current Low IOL 4.0 mA 6, 7
DIFFSENS SE Operating Range VSEOR -0.3 +0.5 V
DIFFSENS LVD Operating Range VLVDOR 0.7 1.9 V
DIFFSENS HVD Operating Range VHVDOR 2.4
VTPWR
+ 0.3 V
DIFFSENSE Driver Output Voltage VDSO 1.2 1.4 V 8, 9
DIFFSENSE Driver Source Current IDSH 5 15 mA 8, 10, 12
DIFFSENSE Driver Sink Current IDSL 20 200 µA 8, 11
Thermal Shutdown 150 ºC 3
PARAMETER NNNNNNNNN
DS2117M
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REGULATOR CHARACTERISTICS
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Line Regulation LIREG 1.0 2.5 %
Load Regulation LOREG 1.3 3.5 %
Current Limit ILIM 550 mA
Sink Current ISINK 200 mA
NOTES:
1) VLINE = 0 to 3.0V.
2) VLINE = 0.2V.
3) Guaranteed by design.
4) All lines open.
5) VOUT = 2.4V.
6) VOUT = 0.4V.
7) SE/LVD/HVD pins only.
8) MSTR/SLV = 1.
9) IDS = 0 to 5mA.
10) VDSO = 0V.
11) VDSO = 2.75V.
12) TPWR = 5.5V
I> DE SEE DEIAIL A h x 45‘—-l-— A J A1 L% A __ A I I SECTION A—A DETAIL A 0' — 8' fi‘
DS2117M
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DS2117M 36-PIN SSOP PACKAGE
DIM MIN MAX
A 2.44 2.64
A1 0.12 -
b 0.29 0.43
c 0.23 0.32
D 15.20 15.54
E 10.11 10.52
E1 7.40 7.60
e 0.80 BSC
h 0.25 0.71
L 0.51 1.02
DIMENSIONS D AND E1 INCLUDE MOLD MISMATCH, BUT DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.254mm PER SIDE.
SECTION A-A DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD
BETWEEN 0.13mm TO 0.25mm FROM THE LEAD TIP.
THE CHAMFER ON THE BODY IS OPTIONAL. IF IT IS NOT PRESENT, A VISUAL
INDEX FEATURE MUST BE LOCATED WITHIN THE CROSS-HATCHED AREA.
DIMENSIONS ARE IN MILLIMETERS

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