HMC241ALP3E Datasheet by Analog Devices Inc.

View All Related Products | Download PDF Datasheet
ANALOG DEVICES HM8241ALP3E RRRRR uuuuuuuuuuuuuuuu W W D T { b q W i a
GaAs, Nonreflective, SP4T Switch
100 MHz to 4 GHz
Data Sheet
HMC241ALP3E
Rev. C Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2018 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Broadband frequency range: 100 MHz to 4 GHz
Nonreflective 50 Ω design
Low insertion loss: 0.7 dB at 2 GHz
High isolation: 43 dB at 2 GHz
High input linearity at 250 MHz to 4 GHz
1 dB compression (P1dB): 29 dBm typical
Third order intercept (IP3): 47 dBm typical
High power handling
28.5 dBm through path
25 dBm terminated path
Single positive supply: 3 V to 5 V
Integrated 2 to 4 line decoder
16-lead, 3 mm × 3 mm LFCSP package
ESD rating: 250 V (Class 1A)
Pin compatible with the HMC7992
APPLICATIONS
Cellular/4 G infrastructure
Wireless infrastructure
Automotive telematics
Mobile radios
Test equipment
FUNCTIONAL BLOCK DIAGRAM
12
11
10
1
3
49
2
6
5
7
8
16
15
14
13
RF4
NIC
NIC
RF3
RF1
NIC
GND
RFC
GND
NIC
NIC
RF2
GND
PACKAGE
BASE
V
DD
B
A
2:4 TTL
DECODER
HMC241ALP3E
16215-001
Figure 1.
GENERAL DESCRIPTION
The HMC241ALP3E is a general-purpose, nonreflective,
100 MHz to 4 GHz single-pole, four-throw (SP4T) switch
manufactured using a gallium arsenide (GaAs) process. This
switch offers high isolation of 43 dB typical at 2 GHz, low
insertion loss of 0.7 dB at 2 GHz, and on-chip termination of
the isolated ports.
The on-chip circuitry allows the HMC241ALP3E to operate at a
single, positive supply voltage range of 3 V to 5 V. This switch
requires two positive logic control voltages. The HMC241ALP3E
includes an on-chip, binary two to four line decoder that
provides logic control from two logic input lines to select one of
the four radio frequency (RF) lines.
The HMC241ALP3E is available in a 3 mm × 3 mm, 16-lead
LFCSP package. The HMC7992 is the silicon version of this
switch and features better performance up to higher
frequencies.
HMC241ALP3E Data Sheet
Rev. C | Page 2 of 11
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Interface Schematics..................................................................... 5
Typical Performance Charcteristics ................................................6
Insertion Loss, Return Loss, and Isolation ................................6
Input Power Compression and Third-Order Intercept (IP3) ..7
Theory of Operations ........................................................................8
Applications Information .................................................................9
Evaluation Board ...........................................................................9
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
8/2018—Rev. B to Rev. C
Changed Reflow Temperature (MSL1 Rating) to Reflow
Temperature, Table 2 ........................................................................ 4
Deleted Note 1, Table 2; Renumbered Sequentially ..................... 4
Changes to Theory of Operation Section ...................................... 8
Changes to Ordering Guide .......................................................... 11
11/2017—Rev. A to Rev. B
This Hittite Microwave Products data sheet has been reformatted to
meet the styles and standards of Analog Devices, Inc.
Changed N/C to NIC .................................................... Throughout
Changes to Features, Applications, and General Description .... 1
Changes to Tabl e 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Changes to Figure 2 and Table 3 ..................................................... 5
Changes to Figure 10 through Figure 13 ....................................... 7
Added Theory of Operation Section ............................................. 8
Added Applications Information Section ..................................... 9
Changes to Table 5 ............................................................................ 9
Updated Outline Dimensions ....................................................... 11
Changes to Ordering Guide .......................................................... 11
Data Sheet HMC241ALP3E
Rev. C | Page 3 of 11
SPECIFICATIONS
VDD = 3 V or 5 V, VCTRL = 0 V or VDD, TCASE = 25°C, 50 Ω system, unless otherwise noted.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
FREQUENCY RANGE f 0.1 4 GHz
INSERTION LOSS
Between RFC and RF1 to RF4 (On) 100 MHz to 1 GHz 0.6 0.9 dB
1 GHz to 2 GHz 0.7 1.0 dB
2 GHz to 2.5 GHz 0.9 1.2 dB
2.5 GHz to 4 GHz 1.2 1.5 dB
ISOLATION
Between RFC and RF1 to RF4 (Off) 100 MHz to 1 GHz 40 45 dB
1 GHz to 2 GHz 38 43 dB
2 GHz to 2.5 GHz 35 41 dB
2.5 GHz to 4 GHz 25 32 dB
RETURN LOSS
RFC and RF1 to RF4 (On) 100 MHz to 2.5 GHz 18 dB
2.5 GHz to 4 GHz 12 dB
RF1 to RF4 (Off) 100 MHz to 4 GHz 12 dB
SWITCHING 250 MHz to 4 GHz
Rise and Fall Time tRISE, tFALL 10 % to 90 % of RF output 30 ns
On and Off Time tON, tOFF 50 % VCTL to 90 % of RF output 100 ns
INPUT LINEARITY1 250 MHz to 4 GHz
1 dB Power Compression P1dB VDD = 3 V 24 dBm
DD
23
29
dBm
Third-Order Intercept IP3 10 dBm per tone, 1 MHz spacing
VDD = 3 V 50 dBm
VDD = 5 V 47 dBm
SUPPLY VDD pin
Voltage VDD 3 5 V
Current IDD 2.5 5 mA
DIGITAL CONTROL INPUTS CTRLA and CTRLB pins
Voltage VCTL
Low VINL VDD = 3 V 0 0.8 V
VDD = 5 V 0 0.8 V
High VINH VDD = 3 V 2 3 V
VDD = 5 V 2 5 V
Current
Low IINL 0.2 µA
High IINH 40 µA
1 Input linearity performance degrades at frequencies less than 250 MHz.
Am ESD [electrosla‘iz charge] sensitive daviu, Charged demes and mum boavds can dmavge wmm daemon Mmough m; pmdun lemmas paxemed or pvopneKary pvmemon mumy, damage may cum on dewces summed m hlgh enevgy ESD Therelave, proper ESD pvenammns mama be taken In avmd pevformance degvadanon or loss of funnionahxyv
HMC241ALP3E Data Sheet
Rev. C | Page 4 of 11
ABSOLUTE MAXIMUM RATINGS
For recommended operating conditions, see Table 1.
Table 2.
Parameter Rating
Positive Supply Voltage (VDD) 7 V
Digital Control Input Voltage 0.5 V to VDD +1 V
RF Input Power
(f = 100 MHz to 4 GHz, TCASE = 85°C)
VDD = 3 V
Through Path 23.5 dBm
Terminated Path
20 dBm
Hot Switching 17.5 dBm
VDD = 5 V
Through Path 28.5 dBm
Terminated Path 25 dBm
Hot Switching 22.5 dBm
Junction Temperature, T
J
150°C
Storage Temperature Range −65°C to +150°C
Reflow Temperature 260°C
Junction to Case Thermal Resistance, θJC
Through Path 144°C/W
Terminated Path
300°C/W
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM) 250 V (Class 1A)
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
E; ”H?
Data Sheet HMC241ALP3E
Rev. C | Page 5 of 11
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
12
11
10
1
3
49
2
6
5
7
8
16
15
14
13
RF4
NIC
NIC
RF3
RF1
NIC
GND
RFC
GND
NIC
NIC
RF2
GND
V
DD
B
A
HMC241ALP3E
TOP VIEW
(Not to Scale)
NOTES
1. NOT INTERNALLY CONNECTED. THESE
PINS MUST BE CONNECTED TO PCB RF
GROUND TO MAXIMIZE ISOLATION.
2. THE EXPOSED PAD MUST BE
CONNECTED TO RF/DC GROUND.
16215-003
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 RF4 RF Port 4. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
2, 3, 10, 11,
13
NIC Not Internally Connected. These pins must be connected to the printed circuit board (PCB) RF ground to
maximize isolation.
4 RF3 RF Port 3. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
5, 14, 16 GND Ground. The package bottom has an exposed metal pad that must connect to the PCB RF/dc ground.
6 VDD Supply Voltage.
7
B
Logic Control Input B. See Figure 4 for the control input interface schematic. See Table 4 and the
recommended input control voltages range in Table 1
8 A Logic Control Input A. See Figure 4 for the control input interface schematic. See Table 4 and the
recommended input control voltages range in Table 1
9 RF2 RF Port 2. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
12 RF1 RF Port 1. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
15 RFC RF Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
EPAD Exposed Pad. The exposed pad must be connected to RF/dc ground.
INTERFACE SCHEMATICS
RFC,
RF1,
RF2,
RF3,
RF4
16215-004
Figure 3. RFC to RF4 Interface Schematic
600Ω 80kΩ
V
DD
16215-005
Figure 4. CTRLA and CTRLB Interface Schematic
2pF
V
DD
16215-006
Figure 5. Supply Voltage Schematic
‘=‘g\_ \A \ x/ /7/4 /’\'/ ’/
HMC241ALP3E Data Sheet
Rev. C | Page 6 of 11
TYPICAL PERFORMANCE CHARCTERISTICS
INSERTION LOSS, RETURN LOSS, AND ISOLATION
Figure 6. Insertion Loss Between RFC and RF1 vs. Frequency at Various
Temperatures
Figure 7. Return Loss for RFC, RF1 to RF4 On, and RF1 to RF4 Off vs.
Frequency
Figure 8. Insertion Loss Between RFC to RFx vs. Frequency
Figure 9. Isolation Between RFC and RFx vs. Frequency
0
–5
–4
–3
–2
–1
0 1 2 3 4 5 6
INSERTION LOSS (dB)
FREQUENCY (GHz)
+85°C
+25°C
–40°C
16215-007
0
–35
–30
–25
–20
–15
–10
–5
0 1 2 3 4 5 6
RETURN LOSS (dB)
FREQUENCY (GHz)
RFC
RF1 TO RF4 OFF
RF1 TO RF4 ON
16215-008
0
–5
–4
–3
–2
–1
0 1 2 3 4 5 6
INSERTION LOSS (dB)
FREQUENCY (GHz)
RF1
RF2
RF3
RF4
16215-009
0
–70
–60
–50
–40
–30
–20
–10
0 1 2 3 4 5 6
RETURN LOSS (dB)
FREQUENCY (GHz)
RF1
RF2
RF3
RF4
16215-010
U\_ V\
Data Sheet HMC241ALP3E
Rev. C | Page 7 of 11
INPUT POWER COMPRESSION AND THIRD-ORDER INTERCEPT (IP3)
Figure 10. Input Compression vs. Frequency at Room Temperature, VDD = 3 V
Figure 11. Input IP3 vs. Frequency at Room Temperature, VDD = 3 V
Figure 12. Input Compression vs. Frequency at Room Temperature, VDD = 5 V
Figure 13. Input IP3 vs. Frequency at Room Temperature, VDD = 5 V
35
15
20
25
30
0 1 2 3 4 5 6
INPUT COMPRESSION (dB)
FREQUENCY (GHz)
P1dB
P0.1dB
16215-011
55
35
40
45
50
0 1 23 4 5 6
INPUT IP3 (dB)
FREQUENCY (GHz)
16215-012
35
15
20
25
30
0 1 2 3 4 5 6
INPUT COMPRESSION (dB)
FREQUENCY (GHz)
P1dB
P0.1dB
16215-013
55
35
40
45
50
01 2 3 456
INPUT IP3 (dB)
FREQUENCY (GHz)
16215-014
HMC241ALP3E Data Sheet
Rev. C | Page 8 of 11
THEORY OF OPERATIONS
The HMC241ALP3E requires a positive supply voltage at the
VDD pin and two logic control inputs at the A and B pins to
control the state of the RF paths.
Depending on the logic level applied to the A and B pins, one
RF path is in the insertion loss state while the other three paths
are in an isolation state (See Table 4). The insertion loss path
conducts the RF signal between the RF throw pad and RF common
pad while the isolation paths provide high loss between RF throw
pads terminated to internal 50 Ω resistors and the insertion loss
path.
The ideal power-up sequence is as follows:
1. Power up GND.
2. Power up VDD.
3. Power up the digital control inputs. The relative order of the
logic control inputs is not important. However, powering the
digital control inputs before the VDD supply can inadvertently
become forward biased and damage the internal ESD
protection structures.
4. Apply an RF input signal. The design is bidirectional; the
RF input signal can be applied to the RFC pad while the RF
throw pads are the outputs, or the RF input signal can be
applied to the RF throw pads while the RFC pad is the
output. All of the RF ports are dc-coupled to VDD through
internal resistors. Therefore, dc blocking the capacitors are
required at the RF ports.
The power-down sequence is the reverse of the power-up
sequence.
Table 4. Control Voltage Truth Table
Digital Control Input RF Paths
CTRLA
CTRLB
RFC to RF1
RFC to RF2
RFC to RF3
RFC to RF4
Low Low Insertion loss (on) Isolation (off) Isolation (off) Isolation (off)
High
Low
Isolation (off)
Insertion loss (on)
Isolation (off)
Isolation (off)
Low High Isolation (off) Isolation (off) Insertion loss (on) Isolation (off)
High High Isolation (off) Isolation (off) Isolation (off ) Insertion loss (on)
Data Sheet HMC241ALP3E
Rev. C | Page 9 of 11
APPLICATIONS INFORMATION
EVALUATION BOARD
The 108333-HMC241ALP3 is a 4-layer evaluation board. Each
copper layer is 0.7 mil (0.5 oz) and separated by dielectric
materials. Figure 14 shows the stack up for this
evaluation board.
TOTAL THICKNESS
~62mil
0.5oz Cu (0.7mil)
R04350
R04350
FR4
0.5oz Cu (0.7mil)
0.5oz Cu (0.7mil)
0.5oz Cu (0.7mil) 0.5oz Cu (0.7mil) 0.5oz Cu (0.7mil) T = 0.7mil
W = 16mil
G = 13mil
H = 10mil
16215-015
Figure 14. The 108333-HMC241ALP3 Evaluation Board (Cross Sectional View)
All RF and dc traces are routed on the top copper layer whereas
the inner and bottom layers are grounded planes that provide a
solid ground for the RF transmission lines. Top dielectric
material is a 10 mil Rogers RO4350. The middle and bottom
dielectric materials provide mechanical strength. The overall
board thickness is 62 mil, allowing the SMA launchers to be
connected at the board edges.
The RF transmission lines were designed using a coplanar
waveguide (CPWG) model, with trace width of 16 mil and
ground clearance of 13 mil to have a characteristic impedance
of 50 Ω. For optimal RF and thermal grounding, as many plated
through vias as possible are arranged around transmission lines
and under the exposed pad of the package.
Figure 15 shows the layout of the 108333-HMC241ALP3
evaluation board with component placement. The power supply
port is connected to the VDD test point, J6. The control voltages
are connected to the A and B test points, J8 and J7. The ground
reference is connected to the GND test point, J9. The NIC pins are
connected to the PCB ground to maximize isolation. On the
supply trace, VDD, a 10 nF bypass capacitor, is used to filter high
frequency noise.
The RF input and output ports (RFC, RF1, RF2, RF3, and RF4)
are connected through 50 Ω transmission lines to the soldered
down SMA launchers, J1 to J5. For dc blocking to the RF pins,
C1 to C5 are populated with 100 pF capacitors. A thru calibration
line connects the unpopulated J10 and J11 launchers; this
transmission line is used to estimate the loss of the PCB over
the environmental conditions being evaluated.
Table 5 and Figure 16 are the bill of materials and schematic,
respectively.
Table 5. Evaluation Board Components
Component Default Value Description
J1 to J5 Not Applicable PCB mount SMA connector
J6 to J9 Not Applicable DC pin
J10, J11 Do not insert PCB mount SMA connector
C1 to C5 100 pF Capacitor, C0402 package
C6 10 nF Capacitor, C0402 package
U1 Not Applicable HMC241ALP3E SP4T switch
PCB 104708 Evaluation PCB
J4 J5
HMC241ALP3E Data Sheet
Rev. C | Page 10 of 11
16215-016
Figure 15. 108333-HMC241ALP3 Evaluation Board Component Placement
C5
RF1
J1
C6
J5
RF3
C3
RF2
RFC
J7
C1
THRU CAL
C4
J4
B
J8
HMC241ALP3E
RF4
1
NIC
2
NIC
3
RF3
4
12
11
10
9
V
DD
6
B
7
A
8
RF2
NIC
NIC
RF1
NIC 13
GND 14
RFC 15
GND 16
EPAD
GND
5
C2
J6
V
DD
A
J3
J2
J10
RF4
J11
16215-017
Figure 16. Evaluation Board Schematic
\K’ a *‘H‘ W 7 V ANALOG www.analug.cum DEVICES
Data Sheet HMC241ALP3E
Rev. C | Page 11 of 11
OUTLINE DIMENSIONS
3.10
3.00 SQ
2.90
0.30
0.25
0.20
1.70
1.60 SQ
1.50
1
0.50
BSC
BOTTOM VIEWTOP VIEW
16
5
8
9
12
13
4
0.05 MAX
0.02 NOM
0.203 REF
0.20 MIN
COPLANARITY
0.08
PIN 1
INDICATOR
0.90
0.85
0.80
0.45
0.40
0.35
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
11-22-2016-A
PKG-004831
COMPLIANT TO JEDEC STANDARDS MO-220-VEED-4
EXPOSED
PAD
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
DETAIL A
(JEDEC 95)
SEATING
PLANE
Figure 17. 16-Terminal Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.85 mm Package Height
(CP-16-50)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
HMC241ALP3E −40°C to +85°C 16-Terminal Lead Frame Chip Scale Package [LFCSP] CP-16-50
HMC241ALP3ETR −40°C to +85°C 16-Terminal Lead Frame Chip Scale Package [LFCSP] CP-16-50
108333-HMC241ALP3 Evaluation Board
1 All models are RoHS compliant.
©2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D16215-0-8/18(C)

Products related to this Datasheet

IC RF SWITCH SP4T 4GHZ 16SMT
IC RF SWITCH SP4T 4GHZ 16SMT
EVAL BOARD HMC241 PCB ASSEMBLY
IC RF SWITCH SP4T 4GHZ 16SMT
IC RF SWITCH SP4T 4GHZ 16SMT