LTC3630A Datasheet by Analog Devices Inc.

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LTC3630A
1
3630afc
For more information www.linear.com/LTC3630A
Typical applicaTion
FeaTures DescripTion
High Efficiency, 76V
500mA Synchronous
Step-Down Converter
The LTC
®
3630A is a high efficiency step-down DC/DC
converter with internal high side and synchronous power
switches that draws only 12μA typical DC supply current
while maintaining a regulated output voltage at no load.
The LTC3630A can supply up to 500mA load current and
features a programmable peak current limit that provides
a simple method for optimizing efficiency and for reduc-
ing output ripple and component size. The LTC3630A’s
combination of Burst Mode
®
operation, integrated power
switches, low quiescent current, and programmable peak
current limit provides high efficiency over a broad range
of load currents.
With its wide input range of 4V to 76V, the LTC3630A is
a robust converter suited for regulating a wide variety of
power sources. A feedback comparator output enables
multiple LTC3630As to be paralleled in higher current
applications.
The LTC3630A is available in the thermally-enhanced
3mm × 5mm DFN and the MSE16 packages.
PARAMETER LTC3630A LTC3630
Maximum Operating VIN 76V 65V
Absolute Maximum VIN 80V 70V
Efficiency and Power Loss vs Load Current
12.5V to 76V Input to 12V Output, 500mA Step-Down Converter
applicaTions
n Wide Operating Input Voltage Range: 4V to 76V
n Synchronous Operation for Highest Efficiency
n Internal High Side and Low Side Power MOSFETs
n No Compensation Required
n Adjustable 50mA to 500mA Maximum Output Current
n Low Dropout Operation: 100% Duty Cycle
n Low Quiescent Current: 12µA
n Wide Output Range: 0.8V to VIN
n 0.8V ±1% Feedback Voltage Reference
n Precise RUN Pin Threshold
n Internal and External Soft-Start
n Programmable 1.8V, 3.3V, 5V or Adjustable Output
n Few External Components Required
n Low Profile (0.75mm) 3mm × 5mm DFN and
Thermally-Enhanced MSE16 Packages
n Industrial Control Supplies
n Medical Devices
n Portable Instruments
n Automotive
n Avionics
L, LT, LTC, LT M , Burst Mode, Linear Technology and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
VFB
SW
22µH
VIN
RUN
22µF
VOUT
12V
500mA
200k
2.2µF
VIN
12.5V TO 76V
FBO
ISET SS
VPRG1
VPRG2
GND
LTC3630A
147k
3630a TA01a
LOAD CURRENT (mA)
50
EFFICIENCY (%)
70
90
100
0.1 10 100 1000
3630a TA01b
0
10
20
30
1
80
60
40
VOUT = 12V
VIN = 24V
VIN = 76V
POWER LOSS (mW)
10
1
100
1000
EFFICIENCY
POWER LOSS
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absoluTe MaxiMuM raTings
VIN Supply Voltage ..................................... 0.3V to 80V
RUN Voltage................................................. 0.3V to 6V
SS, FBO, ISET Voltages ................................. 0.3V to 6V
VFB, VPRG1, VPRG2 Voltages ......................... 0.3V to 6V
(Note 1)
1
3
5
6
7
8
SW
VIN
RUN
V
PRG2
V
PRG1
GND
16
14
12
11
10
9
GND
GND
FBO
ISET
SS
VFB
TOP VIEW
17
GND
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
16
15
14
13
12
11
10
9
17
GND
1
2
3
4
5
6
7
8
GND
NC
GND
NC
FBO
ISET
SS
VFB
SW
NC
VIN
NC
RUN
V
PRG2
V
PRG1
GND
TOP VIEW
DHC PACKAGE
16-LEAD (5mm ×
3mm) PLASTIC DFN
(NOTE 6)
TJMAX = 150°C, θJA = 43°C/W, θJC = 5°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
pin conFiguraTion
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3630AEMSE#PBF LTC3630AEMSE#TRPBF 3630A 16-Lead Plastic MSOP –40°C to 125°C
LTC3630AIMSE#PBF LTC3630AIMSE#TRPBF 3630A 16-Lead Plastic MSOP –40°C to 125°C
LTC3630AHMSE#PBF LTC3630AHMSE#TRPBF 3630A 16-Lead Plastic MSOP –40°C to 150°C
LTC3630AMPMSE#PBF LTC3630AMPMSE#TRPBF 3630A 16-Lead Plastic MSOP –55°C to 150°C
LTC3630AEDHC#PBF LTC3630AEDHC#TRPBF 3630A 16-Lead (5mm × 3mm) Plastic DFN –40°C to 125°C
LTC3630AIDHC#PBF LTC3630AIDHC#TRPBF 3630A 16-Lead (5mm × 3mm) Plastic DFN –40°C to 125°C
LTC3630AHDHC#PBF LTC3630AHDHC#TRPBF 3630A 16-Lead (5mm × 3mm) Plastic DFN –40°C to 150°C
LTC3630AMPDHC#PBF LTC3630AMPDHC#TRPBF 3630A 16-Lead (5mm × 3mm) Plastic DFN –55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Operating Junction Temperature Range (Notes 2, 3, 4)
LTC3630AE, LTC3630AI .................... 40°C to 125°C
LTC3630AH .......................................40°C to 150°C
LTC3630AMP ..................................... 55°C to 150°C
Storage Temperature Range ..................65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP ...............................................................300°C
LTC363OA
LTC3630A
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For more information www.linear.com/LTC3630A
elecTrical characTerisTics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Supply (VIN)
VIN Input Voltage Operating Range 4 76 V
VOUT Output Voltage Operating Range (Note 7) 0.8 VIN V
UVLO VIN Undervoltage Lockout VIN Rising
VIN Falling
Hysteresis
l
l
3.45
3.30 3.65
3.5
150
3.85
3.70 V
V
mV
IQDC Supply Current (Note 5)
Active Mode
Sleep Mode
Shutdown Mode
No Load
VRUN = 0V
165
12
5
350
20
10
µA
µA
µA
VRUN RUN Pin Threshold Voltage RUN Rising
RUN Falling
Hysteresis
1.17
1.06 1.21
1.10
110
1.25
1.14 V
V
mV
Output Supply (VFB)
VFB(ADJ) Feedback Comparator Threshold Voltage
(Adjustable Output) VFB Rising, VPRG1 = VPRG2 = 0V
LTC3630AE, LTC 3630AI
LTC3630AH, LTC 3630AMP
l
l
0.792
0.788
0.800
0.800
0.808
0.812
V
V
VFBH Feedback Comparator Hysteresis
(Adjustable Output) VFB Falling, VPRG1 = VPRG2 = 0V l2.5 5 7 mV
IFB Feedback Pin Current VFB = 1V, VPRG1 = 0V, VPRG2 = 0V –10 0 10 nA
VFB(FIXED) Feedback Comparator Threshold Voltages
(Fixed Output) VFB Rising, VPRG1 = SS, VPRG2 = 0V
VFB Falling, VPRG1 = SS, VPRG2 = 0V
l
l
4.940
4.910 5.015
4.985 5.090
5.060 V
V
VFB Rising, VPRG1 = 0V, VPRG2 = SS
VFB Falling, VPRG1 = 0V, VPRG2 = SS
l
l
3.260
3.240 3.310
3.290 3.360
3.340 V
V
VFB Rising, VPRG1 = VPRG2 = SS
VFB Falling, VPRG1 = VPRG2 = SS
l
l
1.780
1.770 1.810
1.8 1.840
1.83 V
V
∆VLINEREG Feedback Voltage Line Regulation VIN = 4V to 76V 0.001 %/V
Operation
IPEAK Peak Current Comparator Threshold ISET Floating
100k Resistor from ISET to GND
ISET Shorted to GND
l
l
l
1
0.45
0.09
1.2
0.6
0.12
1.4
0.75
0.15
A
A
A
RON Power Switch On-Resistance
Top Switch
Bottom Switch
ISW = –200mA
ISW = 200mA
1.00
0.53
Ω
Ω
ILSW Switch Pin Leakage Current RUN = Open, VIN = 65V, SW = 0V 0.1 1 μA
ISS Soft-Start Pin Pull-Up Current VSS < 2.5V 3 5 6 μA
tINT(SS) Internal Soft-Start Time SS Pin Floating 0.8 ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3630A is tested under pulsed load conditions such that
TJ ≈ TA. The LTC3630AE is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3630AI is guaranteed
over the –40°C to 125°C operating junction temperature range, the
LTC3630AH is guaranteed over the –40°C to 150°C operating junction
temperature range and the LTC3630AMP is tested and guaranteed over the
–55°C to 150°C operating junction temperature range.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according to
the formula:
TJ = TA + (PDθJA)
where θJA is 43°C/W for the DFN or 45°C/W for the MSOP.
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Typical perForMance characTerisTics
Efficiency and Power Loss
vs Load Current, VOUT = 5V
Efficiency and Power Loss
vs Load Current, VOUT = 3.3V
Efficiency and Power Loss
vs Load Current, VOUT = 1.8V
Soft-Start Waveform Load Step Transient Response Short-Circuit Response
elecTrical characTerisTics
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Note 4: This IC includes over temperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device. The overtemperature protection level is not production tested.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: For application concerned with pin creepage and clearance
distances at high voltages, the MSOP package should be used. See
Applications Information.
Note 7: At very high input voltages, the minimum output voltage that can
be maintained is limited to VIN – 65V if the load current is less than 5mA.
Refer to the High Input Voltage Considerations in the Operation section.
OUTPUT
VOLTAGE
2V/DIV
INDUCTOR
CURRENT
500mA/DIV
1ms/DIVCOUT = 100µF
FIGURE 13 CIRCUIT
3630a
G01
OUTPUT
VOLTAGE
50mV/DIV
LOAD
CURRENT
200mA/DIV
500µs/DIVVIN = 12V
VOUT = 5V
FIGURE 13 CIRCUIT
3630a
G02
OUTPUT
VOLTAGE
2V/DIV
INDUCTOR
CURRENT
500mA/DIV
200µs/DIVVIN = 12V
VOUT = 5V
FIGURE 13 CIRCUIT
3630a
G03
LOAD CURRENT (mA)
30
90
20
10
80
50
70
10
1
0.1
100
1000
60
40
0.1 10 100 1000
01
EFFICIENCY
VOUT = 5V
FIGURE 13 CIRCUIT
VIN = 12V
VIN = 70V
POWER LOSS
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3630a G05
01
EFFICIENCY
VOUT = 3.3V
FIGURE 13 CIRCUIT
VIN = 12V
VIN = 68V
POWER LOSS (mW)
10
1
0.1
100
1000
POWER LOSS
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3630a G06
01
EFFICIENCY
VOUT = 1.8V
FIGURE 13 CIRCUIT
VIN = 12V
VIN = 67V
POWER LOSS (mW)
10
1
0.1
100
1000
POWER LOSS
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Typical perForMance characTerisTics
Feedback Comparator Trip
Voltage vs Temperature
Feedback Comparator Hysteresis
vs Temperature
Peak Current Trip Threshold
vs Temperature and ISET
Peak Current Trip Threshold
vs RISET
Peak Current Trip Threshold
vs Input Voltage
Quiescent VIN Supply Current
vs Input Voltage
Efficiency vs Input Voltage Line Regulation vs Input Voltage Load Regulation vs Load Current
INPUT VOLTAGE (V)
10
EFFICIENCY (%)
70
75
80
40 7060
3630a G07
65
60
55 20 30 50
85
90
95
ILOAD = 500mA
ILOAD = 100mA
ILOAD = 10mA
ILOAD = 1mA
VOUT = 5V
FIGURE 13 CIRCUIT
INPUT VOLTAGE (V)
5
–0.05
∆V
OUT
/V
OUT
(%)
–0.03
–0.01
0.01
15 25 35 45
3630a G08
55
0.03
0.05
–0.04
–0.02
0
0.02
0.04
75
65
FIGURE 13 CIRCUIT
ILOAD = 500mA
LOAD CURRENT (mA)
0
OUTPUT VOLTAGE (V)
4.99
5.00
5.01
300
500
3630a G09
4.98
4.97
4.96 100 200 400
5.02
5.03
5.04
VIN = 12V
VOUT = 5V
FIGURE 13 CIRCUIT
TEMPERATURE (°C)
–55
0.796
FEEDBACK COMPARATOR TRIP VOLTAGE (V)
0.798
0.800
0.802
0.804
–25 5 35 65
3630a G10
95 125
155
VIN = 12V
TEMPERATURE (°C)
55
4.5
FEEDBACK COMPARATOR HYSTERESIS (mV)
4.6
4.8
4.9
5.0
5.5
5.2
565 95 125
3630a G11
4.7
5.3
5.4
5.1
25 35
155
VIN = 12V
TEMPERATURE (°C)
–55
PEAK CURRENT TRIP THRESHOLD (mA)
600
1000
155
3630a G12
400
0565
–25 35 95 125
VIN = 12V
800
200
1200
1400
ISET OPEN
ISET = GND
RISET = 100kΩ
RISET (kΩ)
0
1000
1200
1400
200
3630a G13
800
600
50 100 150
250
400
200
0
PEAK CURRENT TRIP THRESHOLD (mA)
VIN = 12V
INPUT VOLTAGE (V)
0
800
1000
1400
30 50
3630a G14
600
400
10 20 40 7060
200
0
1200
PEAK CURRENT TRIP THRESHOLD (mA)
ISET = OPEN
ISET = 100k
ISET = 0V
VIN VOLTAGE (V)
5
V
IN
SUPPLY CURRENT (µA)
6
8
10
3630a G15
4
2
025 45
15 35 55
12
14
16
75
65
SLEEP
SHUTDOWN
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Typical perForMance characTerisTics
Switch Leakage Current
vs Temperature
RUN Comparator Threshold
Voltage vs Temperature Operating Waveforms
Quiescent VIN Supply Current
vs Temperature
Switch On-Resistance
vs Input Voltage
Switch On-Resistance
vs Temperature
TEMPERATURE (°C)
55 –25
0
V
IN
SUPPLY CURRENT (µA)
8
20
565 95
3630a G16
4
16
12
35 125
155
VIN = 12V
SLEEP
SHUTDOWN
INPUT VOLTAGE (V)
0
0
SWITCH ON-RESISTANCE (Ω)
0.2
0.6
0.8
1.0
2.0
1.4
20 40
TOP
50
3630a G17
0.4
1.6
1.8
1.2
10 30 7060
BOTTOM
TEMPERATURE (°C)
–55
SWITCH ON-RESISTANCE (Ω)
1.4
35
3630a G18
0.8
0.4
–25 5 65
0.2
0
1.6
1.2
1.0
0.6
95 125
155
VIN = 12V
TOP
BOTTOM
TEMPERATURE (°C)
–55
SWITCH LEAKAGE CURRENT (µA)
10
35
3630a G19
4
0
–25 5 65
–2
–4
–6
14
12
8
6
2
95 125
155
VIN = 65V
SW = 65V
SW = 0V
TEMPERATURE (°C)
–55
RUN COMPARATOR THRESHOLD (V)
1.20
1.25
1.30
35 95
3630a G20
1.15
1.10
–25 5 65 125
155
1.05
1.00
RISING
FALLING
OUTPUT
VOLTAGE
50mV/DIV
SWITCH
VOLTAGE
50V/DIV
INDUCTOR
CURRENT
500mA/DIV
10µs/DIVVIN = 76V
VOUT = 5V
ILOAD = 400mA
FIGURE 13 CIRCUIT
3630a
G21
LTC363OA L7 LJUW 7
LTC3630A
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For more information www.linear.com/LTC3630A
pin FuncTions
SW (Pin 1): Switch Node Connection to Inductor. This
pin connects to the drains of the internal power MOSFET
switches.
NC (Pins 2, 4, 13, 15 DHC Package Only): No Internal
Connection. Leave these pins open.
VIN (Pin 3): Main Input Supply Pin. A ceramic bypass
capacitor should be tied between this pin and GND.
RUN (Pin 5): Run Control Input. A voltage on this pin
above 1.21V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC3630A, reducing quiescent
current to approximatelyA. Optionally, connect to the
input supply through a resistor divider to set the under-
voltage lockout. An internal 2M resistor andA current
source pulls this pin up to an internal 5V reference. See
Applications Information.
VPRG2, VPRG1 (Pins 6, 7): Output Voltage Selection. Short
both pins to ground for an external resistive divider pro-
grammable output voltage. Short VPRG1 to SS and short
VPRG2 to ground for a 5V output voltage. Short VPRG1 to
ground and short VPRG2 to SS for a 3.3V output voltage.
Short both pins to SS for a 1.8V output voltage.
GND (Pins 8, 14, 16, Exposed Pad Pin 17): Ground. The
exposed backside pad must be soldered to the PCB ground
plane for optimal thermal performance.
VFB (Pin 9): Output Voltage Feedback. When configured
for an adjustable output voltage, connect to an external
resistive divider to divide the output voltage down for
comparison to the 0.8V reference. For the fixed output
configuration, directly connect this pin to the output supply.
SS (Pin 10): Soft-Start Control Input. A capacitor to
ground at this pin sets the output voltage ramp time. A
50µA current initially charges the soft-start capacitor until
switching begins, at which time the current is reduced to
its nominal value ofA. The output voltage ramp time
from zero to its regulated value is 1ms for every 16.5nF
of capacitance from SS to GND. If left floating, the ramp
time defaults to an internal 0.8ms soft-start.
ISET (Pin 11): Peak Current Set Input and Voltage Output
Ripple Filter. A resistor from this pin to ground sets the
peak current comparator threshold. Leave floating for the
maximum peak current (1.2A typical) or short to ground
for minimum peak current (0.12A typical). The maximum
output current is one-half the peak current. TheA current
that is sourced out of this pin when switching, is reduced
toA in sleep. Optionally, a capacitor can be placed from
this pin to GND to trade off efficiency for light load output
voltage ripple. See Applications Information.
FBO (Pin 12): Feedback Comparator Output. Connect
to the VFB pins of additional LTC3630As to combine the
output current. The typical pull-up current is 20µA. The
typical pull- down impedance is 70Ω. See Applications
Information.
LTC3630A H2. HE. L7LJCUEN2
LTC3630A
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For more information www.linear.com/LTC3630A
block DiagraM
COUT
CIN
V
OUT
+
+
+
3
+
+
+
PEAK CURRENT
COMPARATOR
REVERSE CURRENT
COMPARATOR
FEEDBACK
COMPARATOR VOLTAGE
REFERENCE
VPRG2
GND
GND
SS
SS
VPRG1
GND
SS
GND
SS
R1
1.0M
4.2M
2.5M
1.0M
R2
800k
800k
800k
VOUT
ADJUSTABLE
5V FIXED
3.3V FIXED
1.8V FIXED
START-UP: 50µA
NORMAL: 5µA
IMPLEMENT DIVIDER
EXTERNALLY FOR
ADJUSTABLE VERSION
VIN VIN
1
SW L1
GND
LOGIC
AND
SHOOT-
THROUGH
PREVENTION
16
SS
R2
R1
5V
5V
20µA
FBO
70Ω 10
12
GND
8
14
GND
17
VFB 9
VPRG1 7
VPRG2
3630a BD
6
0.800V
1.21V
RUN
2M
5V
ISET
11
ACTIVE: 5µA
SLEEP: 1µA
SLEEP, ACTIVE: 2µA
SHUTDOWN: 0µA
1.3V
5
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LTC3630A
9
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For more information www.linear.com/LTC3630A
operaTion
The LTC3630A is a synchronous step-down DC/DC con-
verter with internal power switches that uses Burst Mode
control. The low quiescent current and high switching
frequency results in high efficiency across a wide range
of load currents. Burst Mode operation functions by using
shortburst” cycles to switch the inductor current through
the internal power MOSFETs, followed by a sleep cycle
where the power switches are off and the load current is
supplied by the output capacitor. During the sleep cycle,
the LTC3630A draws only 12µA of supply current. At light
loads, the burst cycles are a small percentage of the total
cycle time which minimizes the average supply current,
greatly improving efficiency. Figure 1 shows an example
of Burst Mode operation. The switching frequency and the
number of switching cycles during Burst Mode operation
are dependent on the inductor value, peak current, load
current, input voltage and output voltage.
reducing the VIN pin supply current to only 12µA. As the
load current discharges the output capacitor, the voltage
on the VFB pin decreases. When this voltage falls 5mV
below the 800mV reference, the feedback comparator
trips and enables burst cycles.
At the beginning of the burst cycle, the internal high side
power switch (P-channel MOSFET) is turned on and the
inductor current begins to ramp up. The inductor current
increases until either the current exceeds the peak cur-
rent comparator threshold or the voltage on the VFB pin
exceeds 800mV, at which time the high side power switch
is turned off and the low side power switch (N-channel
MOSFET) turns on. The inductor current ramps down until
the reverse current comparator trips, signaling that the
current is close to zero. If the voltage on the VFB pin is
still less than the 800mV reference, the high side power
switch is turned on again and another cycle commences.
The average current during a burst cycle will normally be
greater than the average load current. For this architecture,
the maximum average output current is equal to half of
the peak current.
The hysteretic nature of this control architecture results
in a switching frequency that is a function of the input
voltage, output voltage, and inductor value. This behavior
provides inherent short-circuit protection. If the output is
shorted to ground, the inductor current will decay very
slowly during a single switching cycle. Since the high side
switch turns on only when the inductor current is near zero,
the LTC3630A inherently switches at a lower frequency
during start-up or short-circuit conditions.
Start-Up and Shutdown
If the voltage on the RUN pin is less than 0.7V, the
LTC3630A enters a shutdown mode in which all internal
circuitry is disabled, reducing the DC supply current to
5µA. When the voltage on the RUN pin exceeds 1.21V,
normal operation of the main control loop is enabled. The
RUN pin comparator has 110mV of internal hysteresis,
and therefore must fall below 1.1V to stop switching and
disable the main control loop.
An internal 0.8ms soft-start function limits the ramp rate
of the output voltage on start-up to prevent excessive input
supply droop. If a longer ramp time and consequently less
BURST
FREQUENCY
INDUCTOR
CURRENT
OUTPUT
VOLTAGE
∆V
OUT 3630a F01
BURST
CYCLE
SLEEP
CYCLE SWITCHING
FREQUENCY
Figure 1. Burst Mode Operation
Main Control Loop
The LTC3630A uses the VPRG1 and VPRG2 control pins to
connect internal feedback resistors to the VFB pin. This
enables fixed outputs of 1.8V, 3.3V or 5V without increas-
ing component count, input supply current or exposure to
noise on the sensitive input to the feedback comparator.
External feedback resistors (adjustable mode) can still
be used by connecting both VPRG1 and VPRG2 to ground.
In adjustable mode the feedback comparator monitors
the voltage on the VFB pin and compares it to an inter-
nal 800mV reference. If this voltage is greater than the
reference, the comparator activates a sleep mode in which
the power switches and current comparators are disabled,
(Refer to Block Diagram)
LTc3630A
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supply droop is desired, a capacitor can be placed from
the SS pin to ground. TheA current that is sourced
out of this pin will create a smooth voltage ramp on the
capacitor. If this ramp rate is slower than the internal
0.8ms soft-start, then the output voltage will be limited
by the ramp rate on the SS pin instead. The internal and
external soft-start functions are reset on start-up and after
an undervoltage event on the input supply.
The peak inductor current is not limited by the internal or
external soft-start functions; however, placing a capacitor
from the ISET pin to ground does provide this capability.
Peak Inductor Current Programming
The peak current comparator nominally limits the peak
inductor current to 1.2A. This peak inductor current can
be adjusted by placing a resistor from the ISET pin to
ground. TheA current sourced out of this pin through
the resistor generates a voltage that adjusts the peak cur-
rent comparator threshold.
During sleep mode, the current sourced out of the ISET pin
is reduced toA. The ISET current is increased back toA
on the first switching cycle after exiting sleep mode. The
ISET current reduction in sleep mode, along with adding
a filtering capacitor, CISET, from the ISET pin to ground,
provides a method of reducing light load output voltage
ripple at the expense of lower efficiency and slightly de-
graded load step transient response.
For applications requiring higher output current, the
LTC3630A provides a feedback comparator output pin
(FBO) for combining the output current of multiple
LTC3630As. By connecting the FBO pin of amaster”
LTC3630A to the VFB pin of one or moreslave” LTC3630As,
the output currents can be combined to source much
more than 500mA.
Dropout Operation
When the input supply decreases toward the output sup-
ply, the duty cycle increases to maintain regulation. The
P-channel MOSFET top switch in the LTC3630A allows
the duty cycle to increase all the way to 100%. At 100%
duty cycle, the P-channel MOSFET stays on continu-
ously, providing output current equal to the peak current,
operaTion
which can be greater than 1A. The power dissipation of
the LTC3630A can increase dramatically during dropout
operation especially at input voltages less than 10V. The
increased power dissipation is due to higher potential
output current and increased P-channel MOSFET on-
resistance. See the Thermal Considerations section of the
Applications Information for a detailed example.
Input Voltage and Overtemperature Protection
When using the LTC3630A, care must be taken not to
exceed any of the ratings specified in the Absolute Maxi-
mum Ratings section. As an added safeguard, however,
the LTC3630A incorporates an overtemperature shutdown
feature. If the junction temperature reaches approximately
180°C, the LTC3630A will enter thermal shutdown mode.
Both power switches will be turned off and the SW node
will become high impedance. After the part has cooled
below 160°C, it will restart. The overtemperature level is
not production tested.
The LTC3630A can provide a programmable undervoltage
lockout which can also serve as a precise input voltage
monitor by using a resistive divider from VIN to GND with
the tap connected to the RUN pin. Switching is enabled
when the RUN pin voltage exceeds 1.21V and is disabled
when dropping below 1.1V. Pulling the RUN pin below
700mV forces a low quiescent current shutdown (5µA).
Furthermore, if the input voltage falls below 3.5V typi-
cal (3.7V maximum), an internal undervoltage detector
disables switching.
When switching is disabled, the LTC3630A can safely
sustain input voltages up to the absolute maximum rating
of 80V. Input supply undervoltage events trigger a soft-
start reset, which results in a graceful recovery from an
input supply transient.
High Input Voltage Considerations
When operating with an input voltage to output voltage
differential of more than 65V, a minimum output load
current of 5mA is required to maintain a well-regulated
output voltage under all operating conditions, including
shutdown mode. If this 5mA minimum load is not available,
then the minimum output voltage that can be maintained
by the LTC3630A is limited to VIN – 65V.
(Refer to Block Diagram)
LTCSéSOA 22m { Vow \ Vow mm L7 LJUW 1 1
LTC3630A
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The basic LTC3630A application circuit is shown on the
front page of the data sheet. External component selection
is determined by the maximum load current requirement
and begins with the selection of the peak current program-
ming resistor, RISET. The inductor value L can then be
determined, followed by capacitors CIN and COUT.
Peak Current Resistor Selection
The peak current comparator has a guaranteed maximum
current limit of 1A (1.2A typical), which guarantees a
maximum average current of 500mA. For applications
that demand less current, the peak current threshold can
be reduced to as little as 100mA (120mA typical). This
lower peak current allows the use of lower value, smaller
components (input capacitor, output capacitor, and induc-
tor), resulting in lower input supply ripple and a smaller
overall DC/DC converter.
The threshold can be easily programmed using a resis-
tor (RISET) between the ISET pin and ground. The voltage
generated on the ISET pin by RISET and the internalA
current source sets the peak current. The voltage on the
ISET pin is internally limited within the range of 0.1V to
1.0V. The value of resistor for a particular peak current can
be selected by using Figure 2 or the following equation:
RISET = IPEAK • 0.2 • 106
where 100mA < IPEAK < 1A.
The internalA current source is reduced toA in
sleep mode to maximize efficiency and to facilitate
a trade-off
between efficiency and light load output
voltage ripple, as described in the CISET Selection
section of the Applications Information. For maxi-
mum efficiency, minimize the capacitance on the ISET
pin and place the RISET resistor as close to the pin
as possible.
The typical peak current is internally limited to be within
the range of 120mA to 1.2A. Shorting the ISET pin to
ground programs the current limit to 120mA, and leav-
ing it float sets the current limit to the maximum value
of 1.2A. When selecting this resistor value, be aware that
the maximum average output current for this architecture
is limited to half of the peak current. Therefore, be sure
to select a value that sets the peak current with enough
margin to provide adequate load current under all condi-
tions. Selecting the peak current to be 2.2 times greater
than the maximum load current is a good starting point for
most applications.
Inductor Selection
The inductor, input voltage, output voltage, and peak
current determine the switching frequency during a burst
cycle of the LTC3630A. For a given input voltage, output
voltage, and peak current, the inductor value sets the
switching frequency during a burst cycle when the output
is in regulation. Generally, switching between 50kHz and
250kHz yields high efficiency, and 200kHz is a good first
choice for many applications. The inductor value can be
determined by the following equation:
L=VOUT
fIPEAK
1VOUT
VIN
The variation in switching frequency during a burst cycle
with input voltage and inductance is shown in Figure 3. For
lower values of IPEAK, multiply the frequency in Figure3
by 1.2A/IPEAK.
An additional constraint on the inductor value is the
LTC3630A’s 150ns minimum on-time of the high side
switch. Therefore, in order to keep the current in the inductor
well-controlled, the inductor value must be chosen so that
Figure 2. RISET Selection
MAXIMUM LOAD CURRENT (mA)
50
R
ISET
(kΩ)
60
180
200
220
150 250 300 350
3630a F02
20
140
100
40
160
0
120
80
100 200 400 450
500
LTC3630A eon man SWITCHING mmumcv (kHz) mnucmn VALUE (tu
LTC3630A
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it is larger than a minimum value which can be computed
as follows:
L>
V
IN(MAX)
t
ON(MIN)
I
PEAK
1.2
where VIN(MAX) is the maximum input supply voltage when
switching is enabled, tON(MIN) is 150ns, IPEAK is the peak
current, and the factor of 1.2 accounts for typical inductor
tolerance and variation over temperature. Inductor values
that violate the above equation will cause the peak current
to overshoot and permanent damage to the part may occur.
Although the above equation provides the minimum in-
ductor value, higher efficiency is generally achieved with
a larger inductor value, which produces a lower switching
frequency. The inductor value chosen should also be large
enough to keep the inductor current from going very nega-
tive which is more of a concern at higher VOUT (>~12V). For
a given inductor type, however, as inductance is increased,
DC resistance (DCR) also increases. Higher DCR trans-
lates into higher copper losses and lower current rating,
both of which place an upper limit on the inductance. The
recommended range of inductor values for small surface
mount inductors as a function of peak current is shown
in Figure 4. The values in this range are a good compromise
between the trade-offs discussed above. For applications
where board area is not a limiting factor, inductors with
larger cores can be used, which extends the recommended
range of Figure4 to larger values.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but is very dependent of the inductance selected.
As the inductance increases, core losses decrease. Un-
fortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturateshard,” which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequently output voltage
ripple. Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate energy but generally cost more
than powdered iron core inductors with similar charac-
teristics. The choice of which style inductor to use mainly
depends on the price versus size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
TDK, Toko, and Sumida.
Figure 4. Recommended Inductor Values for Maximum Efficiency
Figure 3. Switching Frequency for VOUT = 3.3V
VIN INPUT VOLTAGE (V)
0
SWITCHING FREQUENCY (kHz)
400
500
600
7060
3630a F03
300
200
010 20 30 40 50
100
VOUT = 3.3V
ISET OPEN
L = 4.2µH
L = 10µH
L = 22µH
L = 47µH L = 100µH
PEAK INDUCTOR CURRENT (mA)
100
10
INDUCTOR VALUE (µH)
100
1000
1000
3630a F04
LTC363OA IPEAK '1 VOUT 160 IPEAK A IPEAK VOUT VIN ,1 Vom IPEAK Vom L7HEJWEGR 1 3
LTC3630A
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CIN and COUT Selection
The input capacitor, CIN, is needed to filter the trapezoidal
current at the source of the top high side MOSFET. CIN
should be sized to provide the energy required to charge
the inductor without causing a large decrease in input
voltage (∆VIN). The relationship between CIN andVIN
is given by:
CIN >
LI
PEAK
2
2V
IN
V
IN
It is recommended to use a larger value for CIN than calcu-
lated by the above equation since capacitance decreases
with applied voltage. In general, a 4.7µF X7R ceramic
capacitor is a good choice for CIN in most LTC3630A
applications.
To minimize large ripple voltage, a low ESR input capaci-
tor sized for the maximum RMS current should be used.
RMS current is given by:
IRMS =IOUT(MAX) VOUT
VIN
VIN
VOUT
1
This formula has a maximum at VIN = 2VOUT, where IRMS =
IOUT/2. This simple worst-case condition is commonly used
for design because even significant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based only on 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design.
The output capacitor, COUT, filters the inductor’s ripple
current and stores energy to satisfy the load current when
the LTC3630A is in sleep. The output ripple has a lower
limit of VOUT/160 due to the 5mV typical hysteresis of the
feedback comparator. The time delay of the comparator
adds an additional ripple voltage that is a function of
the load current. During this delay time, the LTC3630A
continues to switch and supply current to the output. The
output ripple can be approximated by:
VOUT IPEAK
2ILOAD
410–6
C
OUT
+VOUT
160
The output ripple is a maximum at no load and approaches
lower limit of VOUT/160 at full load. Choose the output
capacitor COUT to limit the output voltage rippleVOUT
using the following equation:
COUT IPEAK 210
6
VOUT VOUT
160
The value of the output capacitor must be large enough
to accept the energy stored in the inductor without a large
change in output voltage during a single switching cycle.
Setting this voltage step equal to 1% of the output voltage,
the output capacitor must be:
COUT >50 LIPEAK
VOUT
2
Typically, a capacitor that satisfies the voltage ripple re-
quirement is adequate to filter the inductor ripple. To avoid
overheating, the output capacitor must also be sized to
handle the ripple current generated by the inductor. The
worst-case ripple current in the output capacitor is given
by IRMS = IPEAK/2. Multiple capacitors placed in parallel
may be needed to meet the ESR and RMS current handling
requirements.
Dry tantalum, special polymer, aluminum electrolytic,
and ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important only to use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR but
can be used in cost-sensitive applications provided that
consideration is given to ripple current ratings and long-
term reliability. Ceramic capacitors have excellent low ESR
characteristics but can have high voltage coefficient and
audible piezoelectric effects. The high quality factor (Q)
of ceramic capacitors in series with trace inductance can
also lead to significant input voltage ringing.
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Ceramic Capacitors and Audible Noise
Higher value, lower cost ceramic capacitors are now be-
coming available in smaller case sizes. Their high ripple
current, high voltage rating, and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
VIN. At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
a voltage spike at VIN large enough to damage the part.
For application with inductive source impedance, such as
a long wire, an electrolytic capacitor or a ceramic capacitor
with a series resistor may be required in parallel with CIN
to dampen the ringing of the input supply. Figure 5 shows
this circuit and the typical values required to dampen the
ringing.
Ceramic capacitors are also piezoelectric sensitive. The
LTC3630A’s burst frequency depends on the load current,
and in some applications at light load the LTC3630A can
excite the ceramic capacitor at audio frequencies, gen-
erating audible noise. If the noise is unacceptable, use
a high performance tantalum or electrolytic capacitor at
the output.
Output Voltage Programming
The LTC3630A has three fixed output voltage modes that
can be selected with the VPRG1 and VPRG2 pins and an
adjustable mode. The fixed output modes use an internal
feedback divider which enables higher efficiency, higher
noise immunity, and lower output voltage ripple for 5V,
3.3V and 1.8V applications. To select the fixed 5V output
voltage, connect VPRG1 to SS and VPRG2 to GND. For 3.3V,
connect VPRG1 to GND and VPRG2 to SS. For 1.8V, connect
both VPRG1 and VPRG2 to SS. For any of the fixed output
voltage options, directly connect the VFB pin to VOUT.
For the adjustable output mode (VPRG1 = 0V, VPRG2 = 0V),
the output voltage is set by an external resistive divider
according to the following equation:
VOUT =0.8V 1+
R1
R2
The resistive divider allows the VFB pin to sense a fraction
of the output voltage as shown in Figure 6. The output
voltage can range from 0.8V to VIN. Be careful to keep the
divider resistors very close to the VFB pin to minimize the
trace length and noise pick-up on the sensitive VFB signal.
To minimize the no-load supply current, resistor values in
the megohm range may be used; however, large resistor
values should be used with caution. The feedback divider
is the only load current when in shutdown. If PCB leakage
current to the output node or switch node exceeds the load
current, the output voltage will be pulled up. In normal
operation, this is generally a minor concern since the load
current is much greater than the leakage.
To avoid excessively large values of R1 in high output volt-
age applications (VOUT ≥ 10V), a combination of external
and internal resistors can be used to set the output volt-
age. This has an additional benefit of increasing the noise
immunity on the VFB pin. Figure 7 shows the LTC3630A
with the VFB pin configured for a 5V fixed output with an
external divider to generate a higher output voltage. The
internal 5M resistance appears in parallel with R2, and
the value of R2 must be adjusted accordingly. R2 should
be chosen to be less than 200k to keep the output volt-
age variation less than 1% due to the tolerance of the
LTC3630A’s internal resistor.
R=LIN
CIN
4 • CIN
CIN
LIN
3630a
F05
VIN
LTC3630A
Figure 5. Series RC to Reduce VIN Ringing
VFB
V
OUT
R2
3630a F06
0.8V R1
VPRG1
VPRG2
LTC3630A
Figure 6. Setting the Output Voltage with External Resistors
..,_I U SUPPLV ti 45? 5V #9 L7 LJUW LTC363OA RisinngUVLOThreshold 5uA 0.35V 15
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application circuit. To keep the variation of the rising VIN
UVLO threshold to less than 5% due to the internal pull-
up circuitry, the following equations should be used to
calculate R3 and R4:
R3
RisingV
IN
UVLOThreshold
40µA
R4 =R3 1.21V
RisingVIN UVLOThreshold– 1.21V+R3 4µA
The falling UVLO threshold will be about 10% lower than
the rising VIN UVLO threshold due to the 110mV hysteresis
of the RUN comparator.
For applications that do not require a precise UVLO, the
RUN pin can be left floating. In this configuration, the UVLO
threshold is limited to the internal VIN UVLO thresholds as
shown in the Electrical Characteristics table.
Be aware that the RUN pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the RUN pin from exceeding 6V, the following relation
should be satisfied:
VIN(MAX) < 4.5 • Rising VIN UVLO Threshold
To support a VIN(MAX) greater than 4.5x the external UVLO
threshold, an external 4.7V Zener diode should be used
in parallel with R4. See Figure 11.
Soft-Start
Soft-start is implemented by ramping the effective refer-
ence voltage from 0V to 0.8V. To increase the duration of
soft-start, place a capacitor from the SS pin to ground.
An internalA pull-up current will charge this capacitor.
The value of the soft-start capacitor can be calculated by
the following equation:
CSS =Soft-Start Time
5µA
0.35V
The minimum soft-start time is limited to the internal soft-
start timer of 0.8ms. When the LTC3630A detects a fault
condition (input supply undervoltage or overtemperature)
or when the RUN pin falls below 1.1V, the SS pin is quickly
pulled to ground and the internal soft-start timer is reset.
This ensures an orderly restart when using an external
soft-start capacitor.
4.2M
R1
5V
R2
3630a F07
V
OUT
800k
0.8V
VFB
SS
VPRG1
VPRG2
LTC3630A
Figure 7. Setting the Output Voltage with
External and Internal Resistors
RUN
SUPPLY
LTC3630A
RUN
3630a F08
LTC3630A
Figure 8. RUN Pin Interface to Logic
Figure 9. Adjustable UV Lockout
RUN
5V
2M SLEEP, ACTIVE: 2µA
SHUTDOWN: 0µA
3630a
F09
R3
VIN
LTC3630A
R4
RUN Pin and External Input Undervoltage Lockout
The RUN pin has two different threshold voltage levels.
Pulling the RUN pin below 0.7V puts the LTC3630A into a
low quiescent current shutdown mode (IQ ~ 5µA). When
the RUN pin is greater than 1.21V, the controller is enabled.
Figure 8 shows examples of configurations for driving the
RUN pin from logic.
The RUN pin can alternatively be configured as a precise
undervoltage (UVLO) lockout on the VIN supply with a
resistive divider from VIN to ground. A simple resistive
divider can be used as shown in Figure 9 to meet specific
VIN voltage requirements.
The current that flows through the R3-R4 divider will
directly add to the shutdown, sleep, and active current
of the LTC3630A, and care should be taken to minimize
the impact of this current on the overall efficiency of the
LTC3630A Z'Com 16
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Note that the soft-start capacitor may not be the limiting
factor in the output voltage ramp. The maximum output
current, which is equal to half the peak current, must
charge the output capacitor from 0V to its regulated value.
For small peak currents or large output capacitors, this
ramp time can be significant. Therefore, the output voltage
ramp time from 0V to the regulated VOUT value is limited
to a minimum of:
Ramp Time
2C
OUT
I
PEAK
VOUT
CISET Selection
Once the peak current resistor, RISET, and inductor are se-
lected to meet the load current and frequency requirements,
an optional capacitor, CISET, can be added in parallel with
RISET. This will boost efficiency at mid-loads and reduce
the output voltage ripple dependency on load current at the
expense of slightly degraded load step transient response.
The peak inductor current is controlled by the voltage on
the ISET pin. Current out of the ISET pin isA while the
LTC3630A is switching and is reduced toA during sleep
mode. The ISET current will return toA on the first cycle
after sleep mode. Placing a parallel RC from the ISET pin to
ground filters the ISET voltage as the LTC3630A enters and
exits sleep mode which in turn will affect the output volt-
age ripple, efficiency and load step transient performance.
In general, when RISET is greater than 120k a CISET ca-
pacitor in the 100pF to 200pF range will improve most
performance parameters. When RISET is less than 100k,
the capacitance on the ISET pin should be minimized.
Higher Current Applications
For applications that require more than 500mA, the
LTC3630A provides a feedback comparator output pin
(FBO) for driving additional LTC3630As. When the FBO
pin of amaster” LTC3630A is connected to the VFB pin
of one or moreslave” LTC3630As, the master controls
the burst cycle of the slaves.
Figure 10 shows an example of a 5V, 1A regulator using
two LTC3630As. The master is configured for a 5V fixed
output with external soft-start and the VIN UVLO level is
set by the RUN pin. Since the slaves are directly controlled
VFB
SW
L1
L2
VIN
RUN
R3
CIN
COUT
VOUT
5V
1A
CSS
V
IN
R4 SS
VPRG1
VPRG2
FBO
LTC3630A
(MASTER)
SW
VFB
VIN
RUN SS
VPRG1
VPRG2
FBO
3630a F10
LTC3630A
(SLAVE)
ISET
ISET
Figure 10. 5V, 1A Regulator
by the master, the SS pin of the slave should have minimal
capacitance and the RUN pin of the slave should be floating.
Furthermore, slaves should be configured for a 1.8V fixed
output (VPRG1 = VPRG2 = SS) to set the VFB pin threshold at
1.8V. The inductors L1 and L2 do not necessarily have to
be the same, but should both meet the criteria described
above in the Inductor Selection section.
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses: VIN operating current and I2R losses. The VIN
operating current dominates the efficiency loss at very
low load currents whereas the I2R loss dominates the
efficiency loss at medium to high load currents.
1. The VIN operating current comprises two components:
The DC supply current as given in the electrical charac-
teristics and the internal MOSFET gate charge currents.
LTC363OA L7HEJWEGR 1 7
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applicaTions inForMaTion
The gate charge current results from switching the gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched from high to low to
high again, a packet of charge, ∆Q, moves from VIN to
ground. The resulting ∆Q/dt is the current out of VIN
that is typically larger than the DC bias current.
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. When
switching, the average output current flowing through
the inductor ischopped” between the high side PMOS
switch and the low side NMOS switch. Thus, the series
resistance looking back into the switch pin is a function
of the top and bottom switch RDS(ON) values and the
duty cycle (DC = VOUT/VIN) as follows:
RSW = (RDS(ON)TOP)DC + (RDS(ON)BOT) • (1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteris-
tics curves. Thus, to obtain the I2R losses, simply add
RSW to RL and multiply the result by the square of the
average output current:
I2R Loss = IO2(RSW + RL)
Other losses, including CIN and COUT ESR dissipative
losses and inductor core losses, generally account for
less than 2% of the total power loss.
Thermal Considerations
In most applications, the LTC3630A does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3630A is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such
as dropout, the heat dissipated may exceed the maximum
junction temperature of the part.
To prevent the LTC3630A from exceeding the maximum
junction temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum junc-
tion temperature of the part. The temperature rise from
ambient to junction is given by:
TR = PDθJA
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature is given by:
TJ = TA + TR
Generally, the worst-case power dissipation is in dropout
at low input voltage. In dropout, the LTC3630A can provide
a DC current as high as the full 1.2A peak current to the
output. At low input voltage, this current flows through a
higher resistance MOSFET, which dissipates more power.
As an example, consider the LTC3630A in dropout at an
input voltage of 5V, a load current of 500mA and an ambi-
ent temperature of 85°C. From the Typical Performance
graphs of Switch On-Resistance, the RDS(ON) of the top
switch at VIN = 5V and 100°C is approximately 1.9Ω.
Therefore, the power dissipated by the part is:
PD = (ILOAD)2RDS(ON) = (500mA)2 • 1.9Ω = 0.475W
For the MSOP package the θJA is 45°C/W. Thus, the junc-
tion temperature of the regulator is:
TJ=85°C+0.475W
45°C
W
=106.4°C
which is below the maximum junction temperature of
150°C.
Note that the while the LTC3630A is in dropout, it can
provide output current that is equal to the peak current
of the part. This can increase the chip power dissipation
dramatically and may cause the internal overtemperature
protection circuitry to trigger at 180°C and shut down
the LTC3630A.
Design Example
As a design example, consider using the LTC3630A in an
application with the following specifications: VIN = 24V,
VIN(MAX) = 80V, VOUT = 3.3V, IOUT = 500mA, f = 200kHz.
Furthermore, assume for this example that switching
should start when VIN is greater than 12V.
First, calculate the inductor value that gives the required
switching frequency:
L=3.3V
200kHz 1.2A
13.3V
24V
10µH
LTC3630A 24v o150ns 1.2A 7 E4 3.3V 2-24v-240mv 203.3V'50mV SUmV 1.2A 12V muH |_ .||_
LTC3630A
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applicaTions inForMaTion
Next, verify that this value meets the LMIN requirement.
For this input voltage and peak current, the minimum
inductor value is:
LMIN =
24V 150ns
1.2A
3µH
Therefore, the minimum inductor requirement is satisfied
and the 10μH inductor value may be used.
Next, CIN and COUT are selected. For this design, CIN should
be sized for a current rating of at least:
IRMS =500mA 3.3V
24V 24V
3.3V 1175mARMS
The value of CIN is selected to keep the input from droop-
ing less than 240mV (1%):
CIN >10µH 1.2A2
224V 240mV
2.2µF
COUT will be selected based on a value large enough to
satisfy the output voltage ripple requirement. For a 50mV
output ripple, the value of the output capacitor can be
calculated from:
COUT >10µH 1.2A2
23.3V 50mV
47µF
COUT also needs an ESR that will satisfy the output voltage
ripple requirement. The required ESR can be calculated
from:
ESR <
50mV
1.2A
40m
A 47µF ceramic capacitor has significantly less ESR than
40mΩ.
Since an output voltage of 3.3V is one of the standard
output configurations, the LTC3630A can be configured
by connecting VPRG1 to ground and VPRG2 to the SS pin.
The undervoltage lockout requirement on VIN can be satis-
fied with a resistive divider from VIN to the RUN pin (refer
to Figure 9). Calculate R3 and R4 as follows:
R3 =200kwhichis
12V
40µA
R4 =200k 1.21V
12V – 1.21V +200k 4µA =20.9k
Choose standard values for R3 = 200k, R4 = 21k. Note
that the VIN falling threshold will be 10% less than the
rising threshold or 11V.
Since the maximum VIN is more than 4.5x the UVLO thresh-
old, a 4.7V Zener diode in parallel with R4 is required to
keep the maximum voltage on the RUN pin less than the
absolute maximum of 6V.
The ISET pin should be left open in this example to select
maximum peak current (1.2A typical). Figure 11 shows a
complete schematic for this design example.
VFB
SW
10µH
VIN
RUN
200k
2.2µF 47µF
V
OUT
3.3V
500mA
VIN
24V
21k
4.7V
3630a F11
SS
VPRG2
VPRG1
FBO ISET
GND
LTC3630A
Figure 11. 24V to 3.3V, 500mA Regulator at 200kHz
LTC3630A T... 19 L7 HEW
LTC3630A
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For more information www.linear.com/LTC3630A
applicaTions inForMaTion
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3630A. Check the following in your layout:
1. Large switched currents flow in the power switches and
input capacitor. The loop formed by these components
should be as small as possible. A ground plane is rec-
ommended to minimize ground impedance.
2. Connect the (+) terminal of the input capacitor, CIN, as
close as possible to the VIN pin. This capacitor provides
the AC current into the internal power MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small signal nodes. The rapid transitions on the switching
node can couple to high impedance nodes, in particular
VFB, and create increased output ripple.
4. Flood all unused area on all layers with copper except
for the area under the inductor. Flooding with copper
will reduce the temperature rise of power components.
You can connect the copper areas to any DC net (VIN,
VOUT, GND, or any other DC rail in your system).
VFB
ISET
SW
L1
VIN
RUN
R3 R1
R2
CIN COUT
VOUT
V
IN
R4 RISET
CISET
CSS
3630a
F12
FBO SS
VPRG2
VPRG1
LTC3630A
VIAS TO GROUND PLANE
OUTLINE OF LOCAL GROUND PLANE
VOUT
VIN
GND
GND
L1
COUT
CIN
Figure 12. Example PCB Layout
LTC3630A U m u”—
LTC3630A
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VFB
ISET
SW
L1
33µH
VIN
RUN
FBO
COUT
100µF
×2
CIN
4.7µF
CISET
100pF
RISET
220k
CIN: TDK C5750X7R2A-475M
COUT: 2 × AVX 1812D107MAT
L1: SUMIDA CDRH105RNP-330N
VOUT
5V
500mA
VIN
5V TO 76V
3630a F13
SS
VPRG1
VPRG2
GND
LTC3630A
Figure 13. 5V to 76V Input to 5V Output,
High Efficiency, 500mA Regulator
Pin Clearance/Creepage Considerations
The LTC3630A is available in two packages (MSE16 and
DHC) both with identical functionality. However, the 0.2mm
(minimum space) between pins and paddle on the DHC
package may not provide sufficient PC board trace clear-
ance between high and low voltage pins in some higher
voltage applications. In applications where clearance is
required, the MSE16 package should be used. The MSE16
package has removed pins between all the adjacent high
voltage and low voltage pins, providing 0.657mm clear-
ance which will be sufficient for most applications. For
more information, refer to the printed circuit board design
standards described in IPC-2221 (www.ipc.org).
applicaTions inForMaTion
LTCSéSOA Inn LI “m EFFICIENCH WIUJ) ssm uaMoa LI 500 I I U I I MAXIMUM LOAD CURRENT (mm L7 LJUW 2 1
LTC3630A
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For more information www.linear.com/LTC3630A
Typical applicaTions
VFB
ISET
SW
L1
10µH
VIN
RUN
COUT
10µF
CIN
2.2µF
CSS
100nF
RISET
100k
CIN: MURATA GRM42-2X7R225K25D500
COUT: KEMET C1206C206K9PAC
L1: VISHAY IHLP2020BZ-100M-11
VOUT
3.3V
250mA
VIN
4V TO 24V
3630a TA02a
FBO
SS
VPRG2
VPRG1
GND
LTC3630A
4V to 24V Input to 3.3V Output,
250mA Regulator with External Soft-Start, Small Size
4V to 63V Input to –12V Output, Positive-to-Negative Converter
Efficiency and Power Loss vs Load Current
Maximum Load Current vs Input Voltage
LOAD CURRENT (mA)
30
EFFICIENCY (%)
POWER LOSS (mW)
90
100
20
10
80
50
70
10
1
0.1
100
1000
60
40
0.1 10 100
3630a TA02b
01
EFFICIENCY
VIN = 12V
POWER LOSS
INPUT VOLTAGE (V)
5
0
MAXIMUM LOAD CURRENT (mA)
100
300
400
500
15 25 30 6050 55
3630a TA03b
200
10 20 35 40 45
VOUT = –12V
VFB
SW
L1
22µH
VIN
RUN
ISET
FBO
COUT
22µF
R1
200k
CIN
4.7µF
CIN: KEMET C1210C475K5RAC
COUT: TDK C4532X7R1C226M
L1: WÜRTH 744-711-422-0
V
OUT
–12V
VIN
4V TO 63V
3630a TA03a
SS
VPRG1
VPRG2
GND
LTC3630A
R2
147k
LTC3630A U an EURST FREQUENCY (kHz) 500 MAXIMUM CURRENT (mA) / I] / MP 7" m ’mxm m M \M L7LJCUEN2
LTC3630A
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Typical applicaTions
24.5V to 76V Input to 24V Output with 150mA Input Current Limit Maximum Input and Load Current vs Input Voltage
5V to 76V Input to 5V Output,150mA Regulator
with 20kHz Minimum Burst Frequency Burst Frequency vs Load Current
VFB
SW
L1
33µH
VIN
RUN
ISET
FBO
CIN
2.2µF COUT
10µF
VOUT
5V
150mA
VIN
5V TO 76V
SS
VPRG1
VPRG2
GND
LTC3630A
OUTIN
DIV
V+
SET
LTC6994-1
GND
RISET
60.4k
30.1Ω
3630a TA04
976k
100k
196k
CIN: TDK C3225X7R2AA225M
COUT: AVX 12063D106KAT
L1: COOPER BUSSMAN SD25-330
LOAD CURRENT (mA)
0
0
BURST FREQUENCY (kHz)
40
50
60
1 10 100
3630a TA04b
30
20
10
VIN = 12V
20kHz LIMIT
NO LIMIT
VFB
SW
L1
22µH
VIN
RUN
COUT
22µF
V
OUT
24V
R1
200k
CIN
2.2µF
VIN
24.5V TO 76V
FBO
ISET SS
VPRG1
VPRG2
GND
LTC3630A
R3
806k
R4
7.5k
CIN: TDK C3225X7R2A225M
COUT: TAIYO YUDEN EMK316BJ226ML-T
L1:TDK SLF10145T-220M1R9
R2
53.6k
3630a TA05
INPUT VOLTAGE (V)
25
0
MAXIMUM CURRENT (mA)
100
200
300
400
500
30 40 5035 45 55
3630a TA05b
60
75
7065
MAXIMUM LOAD CURRENT
MAXIMUM INPUT CURRENT
INPUT CURRENT LIMIT
V
OUT
2
R4
R3+R4
MAXIMUM LOAD CURRENT VIN
2R4
R3+R4
LTC363OA 23 L7 LJUW
LTC3630A
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For more information www.linear.com/LTC3630A
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSOP (MSE16(12)) 0213 REV D
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
1.0
(.039)
BSC
1.0
(.039)
BSC
16
16 14 121110
1 3 5 6 7 8
9
9
18
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
BSC
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
0.1016 ±0.0508
(.004 ±.002)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.280 ±0.076
(.011 ±.003)
REF
4.90 ±0.152
(.193 ±.006)
DETAIL “B”
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.12 REF
0.35
REF
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev D)
LTC3630A DHC Package ]]'fififififififlfi;: fifii,i,i 77777 i {mnfifigugfe W quuduuwui Tflflflmimflflfl ié RHEfl‘ L7LJCUEN2
LTC3630A
24
3630afc
For more information www.linear.com/LTC3630A
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
3.00 ±0.10
(2 SIDES)
5.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
R = 0.20
TYP
4.40 ±0.10
(2 SIDES)
18
169
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DHC16) DFN 1103
0.25 ±0.05
PIN 1
NOTCH
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.20 ±0.05
0.50 BSC
0.65 ±0.05
3.50
±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706 Rev Ø)
LTC363OA L7Hߤ0g 25
LTC3630A
25
3630afc
For more information www.linear.com/LTC3630A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 08/13 Removed RUN pin connection from VIN on schematic. 1
B 02/14 Clarified Typical Application 1
C 02/14 Added maximum limits to IQ specification 3
LTC3630A U w‘ | U I”— L7 LJDW
LTC3630A
26
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For more information www.linear.com/LTC3630A
LINEAR TECHNOLOGY CORPORATION 2013
LT 0214 REV C • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTC3630A
relaTeD parTs
Typical applicaTion
4V to 76V Input to 3.3V Output, 500mA Step-Down Converter
SW
VIN
4V TO 76V
LTC3630A
L1
10µH
COUT
47µF
3630a TA06
CIN
2.2µF
VOUT
3.3V
500mA
GND
VFB
SS
VPRG2
RUN
VPRG1
ISET
FBO
VIN
CIN: TDK CGA6N3X7R2A225K
COUT: MURATA GCM32ER70J476KE19L
L1: COILCRAFT MSS1038T-103
PART NUMBER DESCRIPTION COMMENTS
LTC3630 65V 500mA Synchronous Step-Down
DC/DC Converter VIN: 4V to 65V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 5µA,
3mm × 5mm DFN-8, MSOP-16E
LTC3642 45V (T
ransient to 60V) 50mA Synchronous Step-Down
DC/DC Converter VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3mm × 3mm DFN-8, MSOP-8
LTC3631 45V (T
ransient to 60V) 100mA Synchronous Step-Down
DC/DC Converter VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3mm × 3mm DFN-8, MSOP-8
LTC3632 50V (T
ransient to 60V) 20mA Synchronous Step-Down
DC/DC Converter VIN: 4.5V to 50V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3mm × 3mm DFN-8, MSOP-8
LTC3103 15V, 300mA Synchronous Step-Down DC/DC Converter
with Ultralow Quiescent Current VIN: 2.5V to 15V, VOUT(MIN) = 0.6V, IQ = 1.8µA, ISD = 1µA,
3mm × 3mm DFN-10, MSOP-10E
LTC3104 15V, 300mA Synchronous Step-Down DC/DC Converter
with Ultralow Quiescent Current and 10mA LDO VIN: 2.5V to 15V, VOUT(MIN) = 0.6V, IQ = 2.6µA, ISD = 1µA,
4mm × 3mm DFN-14, MSOP-16E
LT3970 40V, 350mA, 2.2MHz High Efficiency Micropower Step-Down
DC/DC Converter with IQ = 2.5µA VIN: 4.2V to 40V, VOUT(MIN) = 1.21V, IQ = 2.5µA, ISD < 1µA,
3mm × 2mm DFN-10, MSOP-10
LT3990 62V, 350mA, 2.2MHz High Efficiency Micropower Step-Down
DC/DC Converter with IQ = 2.5µA VIN: 4.2V to 62V, VOUT(MIN) = 1.21V, IQ = 2.5µA, ISD < 1µA,
3mm × 3mm DFN-10, MSOP-16E
LT3971 38V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down
DC/DC Converter with IQ = 2.8µA VIN: 4.3V to 38V, VOUT(MIN) = 1.19V, IQ = 2.8µA, ISD < 1µA,
3mm × 3mm DFN-10, MSOP-10E
LT3991 55V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down
DC/DC Converter with IQ = 2.8µA VIN: 4.3V to 55V, VOUT(MIN) = 1.19V, IQ = 2.8µA, ISD < 1µA,
3mm × 3mm DFN-10, MSOP-10E
LT3682 36V, 60VMAX, 1A, 2.2MHz High Efficiency Micropower
Step-Down DC/DC Converter VIN: 3.6V to 36V, VOUT(MIN) = 0.8V, IQ = 75µA, ISD < 1µA,
3mm × 3mm DFN-12
LTC3891 Low IQ, 60V Synchronous Step-Down Controller VIN: 4V to 60V, VOUT(MIN) = 0.8V, IQ = 50µA, ISD = 14µA,
3mm × 4mm QFN-20, TSSOP-20E

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