Specifications subject to change without notification. See Connor-Winfield's website for latest revision.
© Copyright 2019 The Connor-Winfield Corporation Not intended for life support applications.
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630-851- 4722
Fax: 630- 851- 5040
Page 3 of 4
Date 08 March 2019
1. Frequency stability vs. change in temperature. [±(Fmax - Fmin)/(2*Fo)].
2. Initial calibration @ 25°C. For OCXO with EFT, the control voltage must be fixed.
3. After 30 days of operation
4. Inclusive of calibration @ 25°C, frequency vs. change in temperature, change in supply voltage (±5%), load change (±5%), shock and vibration
and 20 years aging
5. Minimum "Power On Time" after rail rises from 0 to within +/-5% of Vcc = 1 second.
Vcc ramp rate must be <0.3 volts per millisecond.
6. Attention: To achieve optimal frequency stability, and in some cases to meet the specification stated on this data sheet, it is required that the circuit
connected to this OCXO output must have the equivalent input capacitance that is specified by the nominal load capacitance. Deviations from the
nominal load capacitance will have a graduated effect on the stability of approximately 20 ppb per pF load difference.
7. Positive slope. (Frequency increases as Vc voltage increases. To ensure proper operation of VCOCXO's, the control voltage input must be biased
the nominal control voltage. Failure to bias the Vc input will cause an unstable output condition.
8. Referenced to Fo.
Phase Noise Characteristics
Typical Phase Noise for DOC050F - 010.0M
Parameter Minimum Nominal Maximum Units Notes
@ 1 Hz offset - -67 - dBC/Hz
@ 10 Hz offset - -100 - dBC/Hz
@ 100 Hz offset - -130 - dBC/Hz
@ 1 KHz offset - -148 - dBC/Hz
@ 10 KHz offset - -154 - dBC/Hz
@ 100 KHz offset - -155 - dBC/Hz
DOC Package Package consisting of a FR-4 substrate and Ryton-R-4 cover. Water Resistant package,
non-hermetic seal. (Engineering Properties of Ryton R-4 Application Note AN2100)
Shock 500 G’s 1ms, Halfsine, 3 shocks per direction, per MIL-STD 202G, Method 213B Test Condition D.
Sinusoidal Vibration 0.06” D.A. or 10G’s Peak, 10 to 500 Hz, per MIL-STD-202G, Method 204D, Test Condition A.
Random Vibration 5.35 G’s rms. 20 to 2000 Hz per MIL-STD-202G, Method 214,Test Condition 1A, 15 minutes each axis.
Moisture 10 cycles, 95% RH, Per MIL-STD-202G, Method 112.
Marking Permanency Per MIL-STD-202G, Method 215J.
Solder Process Recommendations: RoHS compliant, lead free. See solder profile on page 4.
In-line reflow: Refer to recommended reflow pre-heat and reflow temperatures on page 4. Package material
consist of Ryton R-4 high temperature cover with FR4 substrate. Component solder is Pb free high
temperature eutectic alloy with a melting point of 221°C.|
In-line oven profile: We recommend using KIC profiler or similar device placing one of the thermocouples on the
device to insure that the internal package temperature does not exceed 221°C.
Removal of device: If for any reason the device needs to be removed from the board, use a temperature controlled
repair station with profile monitoring capabilities. Following a monitored profile will insure the
device is properly pre-heated prior to relow. Refer to IPC 610E for inspection guidelines.
Recommended Cleaning Process: (If required)
Device is non-hermetic, water resistance with four weep holes, one in each corner to allow
moisture to be removed during the drying cycle. We recommend in-line warm water wash
with air knife and drying capabilities. If cleaner does not have drying capability, then use hot air
circulated oven. Boards should be placed in the oven vertically for good water runoff
Device must be dried properly prior to use!
Note: If saponifier is used make sure the device is rinsed properly to insure all residues are removed. PH of saponifier should
not exceed 10.
Drying Temperature: Between 85 to 100°C.
Drying Time: Time will vary depending on the board size.
Caution: Do not submerge the device!
Attention: System Designers please review Application Note AN2093:
System Design Information and Printed Circuit Board Layout Guidelines for OCXO Oscillators. @